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Searched refs:regVPG5_VPG_ISRC1_2_ACCESS_CTRL (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_5_1_offset.h13271 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro
Ddcn_3_1_2_offset.h12975 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro
Ddcn_3_2_1_offset.h12253 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro
Ddcn_3_2_0_offset.h12269 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro
Ddcn_3_1_5_offset.h12838 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro
Ddcn_3_1_4_offset.h12440 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro
Ddcn_3_5_0_offset.h13292 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro
Ddcn_4_1_0_offset.h12996 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro
Ddcn_3_1_6_offset.h13571 #define regVPG5_VPG_ISRC1_2_ACCESS_CTRL macro