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Searched refs:regUVD_VCPU_CACHE_OFFSET2_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h39 #define regUVD_VCPU_CACHE_OFFSET2_BASE_IDX … macro
Dvcn_5_0_0_offset.h377 #define regUVD_VCPU_CACHE_OFFSET2_BASE_IDX … macro
Dvcn_4_0_5_offset.h370 #define regUVD_VCPU_CACHE_OFFSET2_BASE_IDX … macro
Dvcn_4_0_0_offset.h387 #define regUVD_VCPU_CACHE_OFFSET2_BASE_IDX … macro
Dvcn_4_0_3_offset.h389 #define regUVD_VCPU_CACHE_OFFSET2_BASE_IDX … macro