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Searched refs:regUVD_RB_WPTR3 (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h1340 #define regUVD_RB_WPTR3 macro
Dvcn_5_0_0_offset.h1128 #define regUVD_RB_WPTR3 macro
Dvcn_4_0_5_offset.h1303 #define regUVD_RB_WPTR3 macro
Dvcn_4_0_0_offset.h1348 #define regUVD_RB_WPTR3 macro
Dvcn_4_0_3_offset.h1250 #define regUVD_RB_WPTR3 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dvcn_v5_0_0.c61 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_WPTR3),
Dvcn_v4_0_5.c76 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_WPTR3),
Dvcn_v4_0_3.c69 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_WPTR3),
Dvcn_v4_0.c76 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_WPTR3),