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Searched refs:regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0_3.c432 VCN, vcn_inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v4_0_3_mc_resume()
539 VCN, 0, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v4_0_3_mc_resume_dpg_mode()
1014 regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v4_0_3_start_sriov()
Dvcn_v4_0.c465 WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v4_0_mc_resume()
565 VCN, inst_idx, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v4_0_mc_resume_dpg_mode()
1429 regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v4_0_start_sriov()
Dvcn_v5_0_0.c377 WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v5_0_0_mc_resume()
478 VCN, inst_idx, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v5_0_0_mc_resume_dpg_mode()
Dvcn_v4_0_5.c413 WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v4_0_5_mc_resume()
519 VCN, inst_idx, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v4_0_5_mc_resume_dpg_mode()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h222 #define regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW macro
Dvcn_5_0_0_offset.h480 #define regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW macro
Dvcn_4_0_5_offset.h565 #define regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW macro
Dvcn_4_0_0_offset.h588 #define regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW macro
Dvcn_4_0_3_offset.h590 #define regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW macro