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Searched refs:regUVD_JRBC_IB_COND_RD_TIMER_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h963 #define regUVD_JRBC_IB_COND_RD_TIMER_BASE_IDX … macro
Dvcn_5_0_0_offset.h767 #define regUVD_JRBC_IB_COND_RD_TIMER_BASE_IDX … macro
Dvcn_4_0_5_offset.h852 #define regUVD_JRBC_IB_COND_RD_TIMER_BASE_IDX … macro
Dvcn_4_0_0_offset.h883 #define regUVD_JRBC_IB_COND_RD_TIMER_BASE_IDX … macro