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Searched refs:regSWRST_GENERAL_CONTROL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/pcie/
Dpcie_6_1_0_offset.h489 #define regSWRST_GENERAL_CONTROL_BASE_IDX … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_4_3_0_offset.h6773 #define regSWRST_GENERAL_CONTROL_BASE_IDX … macro
Dnbio_7_2_0_offset.h19311 #define regSWRST_GENERAL_CONTROL_BASE_IDX … macro