Searched refs:regSQ_IND_INDEX (Results 1 – 10 of 10) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 721 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSQ_IND_INDEX, in wave_read_ind()
733 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSQ_IND_INDEX, in wave_read_regs()
1660 {SOC15_REG_ENTRY(GC, 0, regSQ_IND_INDEX)},
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| D | gfx_v9_4_2.c | 1806 WREG32_SOC15_RLC_EX(reg, GC, 0, regSQ_IND_INDEX, in wave_read_ind()
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| D | gfx_v12_0.c | 778 WREG32_SOC15(GC, 0, regSQ_IND_INDEX, in wave_read_ind()
788 WREG32_SOC15(GC, 0, regSQ_IND_INDEX, in wave_read_regs()
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| D | gfx_v11_0.c | 952 WREG32_SOC15(GC, 0, regSQ_IND_INDEX, in wave_read_ind()
962 WREG32_SOC15(GC, 0, regSQ_IND_INDEX, in wave_read_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 6186 #define regSQ_IND_INDEX … macro
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| D | gc_9_4_3_offset.h | 496 #define regSQ_IND_INDEX … macro
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| D | gc_11_5_0_offset.h | 1257 #define regSQ_IND_INDEX … macro
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| D | gc_12_0_0_offset.h | 7311 #define regSQ_IND_INDEX … macro
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| D | gc_11_0_0_offset.h | 2166 #define regSQ_IND_INDEX … macro
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| D | gc_11_0_3_offset.h | 2232 #define regSQ_IND_INDEX … macro
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