Home
last modified time | relevance | path

Searched refs:regSDMA0_QUEUE7_IB_BASE_LO_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h822 #define regSDMA0_QUEUE7_IB_BASE_LO_BASE_IDX … macro
Dgc_12_0_0_offset.h865 #define regSDMA0_QUEUE7_IB_BASE_LO_BASE_IDX … macro
Dgc_11_0_0_offset.h817 #define regSDMA0_QUEUE7_IB_BASE_LO_BASE_IDX … macro
Dgc_11_0_3_offset.h823 #define regSDMA0_QUEUE7_IB_BASE_LO_BASE_IDX … macro