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Searched refs:regRLC_PG_DELAY_3 (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h5054 #define regRLC_PG_DELAY_3 … macro
Dgc_9_4_3_offset.h6570 #define regRLC_PG_DELAY_3 … macro
Dgc_11_5_0_offset.h8625 #define regRLC_PG_DELAY_3 … macro
Dgc_12_0_0_offset.h6454 #define regRLC_PG_DELAY_3 … macro
Dgc_11_0_0_offset.h9954 #define regRLC_PG_DELAY_3 … macro
Dgc_11_0_3_offset.h10556 #define regRLC_PG_DELAY_3 … macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c5385 WREG32_SOC15(GC, 0, regRLC_PG_DELAY_3, RLC_PG_DELAY_3_DEFAULT_GC_11_0_1); in gfx_v11_cntl_power_gating()