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Searched refs:regPCIE_PERF_CNTL_TXCLK5_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/pcie/
Dpcie_6_1_0_offset.h417 #define regPCIE_PERF_CNTL_TXCLK5_BASE_IDX … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_4_3_0_offset.h6701 #define regPCIE_PERF_CNTL_TXCLK5_BASE_IDX … macro