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Searched refs:regPA_CL_ENHANCE (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dimu_v12_0.c208 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regPA_CL_ENHANCE, 0x00880007, 0x1c0000),
Dgfx_v11_0.c255 SOC15_REG_GOLDEN_VALUE(GC, 0, regPA_CL_ENHANCE, 0xf0ffffff, 0x00880007),
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h3628 #define regPA_CL_ENHANCE macro
Dgc_9_4_3_offset.h338 #define regPA_CL_ENHANCE macro
Dgc_11_5_0_offset.h1195 #define regPA_CL_ENHANCE macro
Dgc_12_0_0_offset.h7229 #define regPA_CL_ENHANCE macro
Dgc_11_0_0_offset.h2098 #define regPA_CL_ENHANCE macro
Dgc_11_0_3_offset.h2162 #define regPA_CL_ENHANCE macro