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Searched refs:regMPC_OUT0_CSC_C21_C22_A_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_5_1_offset.h13092 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro
Ddcn_3_1_2_offset.h7440 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro
Ddcn_3_2_1_offset.h6869 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro
Ddcn_3_2_0_offset.h6870 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro
Ddcn_3_1_5_offset.h7199 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro
Ddcn_3_1_4_offset.h14179 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro
Ddcn_3_5_0_offset.h13113 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro
Ddcn_4_1_0_offset.h7649 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro
Ddcn_3_1_6_offset.h7660 #define regMPC_OUT0_CSC_C21_C22_A_BASE_IDX macro