Searched refs:regMMVM_L2_CNTL2 (Results 1 – 10 of 10) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | mmhub_v3_0_2.c | 246 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v3_0_2_init_cache_regs()
249 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v3_0_2_init_cache_regs()
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| D | mmhub_v3_0_1.c | 247 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v3_0_1_init_cache_regs()
250 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v3_0_1_init_cache_regs()
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| D | mmhub_v3_3.c | 243 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v3_3_init_cache_regs()
246 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v3_3_init_cache_regs()
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| D | mmhub_v3_0.c | 254 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v3_0_init_cache_regs()
257 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v3_0_init_cache_regs()
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| D | mmhub_v4_1_0.c | 255 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v4_1_0_init_cache_regs()
258 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v4_1_0_init_cache_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| D | mmhub_4_1_0_offset.h | 732 #define regMMVM_L2_CNTL2 … macro
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| D | mmhub_3_3_0_offset.h | 656 #define regMMVM_L2_CNTL2 … macro
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| D | mmhub_3_0_0_offset.h | 784 #define regMMVM_L2_CNTL2 … macro
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| D | mmhub_3_0_2_offset.h | 742 #define regMMVM_L2_CNTL2 … macro
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| D | mmhub_3_0_1_offset.h | 1036 #define regMMVM_L2_CNTL2 … macro
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