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Searched refs:regMCA_UMC_UMC0_MCUMC_STATUST0 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/umc/
Dumc_12_0_0_offset.h28 #define regMCA_UMC_UMC0_MCUMC_STATUST0 0x03c2 macro
Dumc_8_10_0_offset.h28 #define regMCA_UMC_UMC0_MCUMC_STATUST0 0x03c2 macro
Dumc_6_7_0_offset.h30 #define regMCA_UMC_UMC0_MCUMC_STATUST0 … macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dumc_v8_10.c112 SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0); in umc_v8_10_query_correctable_error_count()
130 mc_umc_status_addr = SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0); in umc_v8_10_query_uncorrectable_error_count()
256 SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0); in umc_v8_10_query_error_address()
Dumc_v6_7.c278 SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0); in umc_v6_7_query_correctable_error_count()
345 SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0); in umc_v6_7_querry_uncorrectable_error_count()
452 SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0); in umc_v6_7_query_error_address()
Dumc_v12_0.c126 SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0); in umc_v12_0_query_error_count_per_type()
341 SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0); in umc_v12_0_query_error_address()