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Searched refs:regGDS_OA_VMID0 (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4_3.c1256 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_OA_VMID0, i, 0); in gfx_v9_4_3_xcc_init_compute_vmid()
1274 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_OA_VMID0, vmid, 0); in gfx_v9_4_3_xcc_init_gds_vmid()
2508 SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_OA_VMID0) + vmid, in gfx_v9_4_3_ring_emit_gds_switch()
Dgfx_v11_0.c1902 WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, i, 0); in gfx_v11_0_init_compute_vmid()
1920 WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, vmid, 0); in gfx_v11_0_init_gds_vmid()
4994 SOC15_REG_OFFSET(GC, 0, regGDS_OA_VMID0) + vmid, in gfx_v11_0_ring_emit_gds_switch()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h1374 #define regGDS_OA_VMID0 macro
Dgc_9_4_3_offset.h3554 #define regGDS_OA_VMID0 macro
Dgc_11_5_0_offset.h3833 #define regGDS_OA_VMID0 macro
Dgc_11_0_0_offset.h4860 #define regGDS_OA_VMID0 macro
Dgc_11_0_3_offset.h5084 #define regGDS_OA_VMID0 macro