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Searched refs:regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dimu_v12_0.c248 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, 0, 0x1c0000)
330 else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB)) in imu_v12_init_gfxhub_settings()
Dgfxhub_v3_0_3.c175 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v3_0_3_init_system_aperture_regs()
Dgfxhub_v3_0.c170 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v3_0_init_system_aperture_regs()
Dgfxhub_v12_0.c178 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v12_0_init_system_aperture_regs()
Dgfxhub_v11_5_0.c174 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v11_5_0_init_system_aperture_regs()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h1817 #define regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB macro
Dgc_12_0_0_offset.h2730 #define regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB macro
Dgc_11_0_0_offset.h2694 #define regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB macro
Dgc_11_0_3_offset.h2832 #define regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB macro