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Searched refs:regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_5_1_offset.h10630 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro
Ddcn_3_1_2_offset.h12628 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro
Ddcn_3_2_1_offset.h11857 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro
Ddcn_3_2_0_offset.h11854 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro
Ddcn_3_1_5_offset.h12493 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro
Ddcn_3_1_4_offset.h11753 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro
Ddcn_3_5_0_offset.h10651 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro
Ddcn_4_1_0_offset.h12054 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro
Ddcn_3_1_6_offset.h13224 #define regDSCC1_DSCC_PPS_CONFIG6_BASE_IDX … macro