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Searched refs:regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_5_1_offset.h10620 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro
Ddcn_3_1_2_offset.h12618 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro
Ddcn_3_2_1_offset.h11847 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro
Ddcn_3_2_0_offset.h11844 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro
Ddcn_3_1_5_offset.h12483 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro
Ddcn_3_1_4_offset.h11743 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro
Ddcn_3_5_0_offset.h10641 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro
Ddcn_4_1_0_offset.h12044 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro
Ddcn_3_1_6_offset.h13214 #define regDSCC1_DSCC_PPS_CONFIG1_BASE_IDX … macro