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Searched refs:regCP_MEC_MDBASE_LO (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c2706 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, addr2); in gfx_v11_0_config_mec_cache_rs64()
3799 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, adev->gfx.mec.mec_fw_data_gpu_addr); in gfx_v11_0_cp_compute_load_microcode_rs64()
Dgfx_v12_0.c2750 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, in gfx_v12_0_cp_compute_load_microcode_rs64()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h8453 #define regCP_MEC_MDBASE_LO … macro
Dgc_12_0_0_offset.h6262 #define regCP_MEC_MDBASE_LO … macro
Dgc_11_0_0_offset.h9782 #define regCP_MEC_MDBASE_LO … macro
Dgc_11_0_3_offset.h10332 #define regCP_MEC_MDBASE_LO … macro