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Searched refs:regCP_MEC1_INSTR_PNTR (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h233 #define regCP_MEC1_INSTR_PNTR … macro
Dgc_9_4_3_offset.h190 #define regCP_MEC1_INSTR_PNTR … macro
Dgc_11_5_0_offset.h1083 #define regCP_MEC1_INSTR_PNTR … macro
Dgc_11_0_0_offset.h1982 #define regCP_MEC1_INSTR_PNTR … macro
Dgc_11_0_3_offset.h2044 #define regCP_MEC1_INSTR_PNTR … macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4_3.c95 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC1_INSTR_PNTR),
Dgfx_v11_0.c153 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC1_INSTR_PNTR),