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Searched refs:regCP_HQD_EOP_WPTR (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h779 #define regCP_HQD_EOP_WPTR … macro
Dgc_9_4_3_offset.h3368 #define regCP_HQD_EOP_WPTR … macro
Dgc_11_5_0_offset.h3659 #define regCP_HQD_EOP_WPTR … macro
Dgc_12_0_0_offset.h3926 #define regCP_HQD_EOP_WPTR … macro
Dgc_11_0_0_offset.h4686 #define regCP_HQD_EOP_WPTR … macro
Dgc_11_0_3_offset.h4910 #define regCP_HQD_EOP_WPTR … macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4_3.c142 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR),
Dgfx_v12_0.c156 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR),
Dgfx_v11_0.c196 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR),