Searched refs:regCPC_INT_STATUS (Results 1 – 9 of 9) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 573 #define regCPC_INT_STATUS … macro
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| D | gc_9_4_3_offset.h | 3034 #define regCPC_INT_STATUS … macro
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| D | gc_11_5_0_offset.h | 3293 #define regCPC_INT_STATUS … macro
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| D | gc_12_0_0_offset.h | 3604 #define regCPC_INT_STATUS … macro
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| D | gc_11_0_0_offset.h | 4320 #define regCPC_INT_STATUS … macro
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| D | gc_11_0_3_offset.h | 4544 #define regCPC_INT_STATUS … macro
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 2989 amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regCPC_INT_STATUS)); in gfx_v9_4_3_ring_emit_fence_kiq()
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| D | gfx_v12_0.c | 4461 amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, regCPC_INT_STATUS)); in gfx_v12_0_ring_emit_fence_kiq()
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| D | gfx_v11_0.c | 5784 amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, regCPC_INT_STATUS)); in gfx_v11_0_ring_emit_fence_kiq()
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