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Searched refs:regBIF_BX_DEV0_EPF0_VF5_MAILBOX_CONTROL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_9_0_offset.h9707 #define regBIF_BX_DEV0_EPF0_VF5_MAILBOX_CONTROL_BASE_IDX macro
Dnbio_4_3_0_offset.h1349 #define regBIF_BX_DEV0_EPF0_VF5_MAILBOX_CONTROL_BASE_IDX macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_3_1_offset.h9234 #define regBIF_BX_DEV0_EPF0_VF5_MAILBOX_CONTROL_BASE_IDX macro