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Searched refs:regBIFPLR5_0_PCIE_MARGINING_ENH_CAP_LIST (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_7_0_offset.h18468 #define regBIFPLR5_0_PCIE_MARGINING_ENH_CAP_LIST … macro
Dnbio_7_2_0_offset.h16986 #define regBIFPLR5_0_PCIE_MARGINING_ENH_CAP_LIST … macro