Home
last modified time | relevance | path

Searched refs:regBIFPLR0_0_PCIE_PORT_VC_CAP_REG2 (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_7_0_offset.h11514 #define regBIFPLR0_0_PCIE_PORT_VC_CAP_REG2 … macro
Dnbio_7_2_0_offset.h13996 #define regBIFPLR0_0_PCIE_PORT_VC_CAP_REG2 … macro