/linux-6.12.1/arch/x86/kernel/ |
D | aperture_64.c | 195 aper_low = read_pci_config(bus, slot, func, 0x10); in read_agp() 196 aper_hi = read_pci_config(bus, slot, func, 0x14); in read_agp() 244 class = read_pci_config(bus, slot, func, in search_agp_bridge() 325 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) in early_gart_iommu_check() 328 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); in early_gart_iommu_check() 332 aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff; in early_gart_iommu_check() 381 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) in early_gart_iommu_check() 384 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); in early_gart_iommu_check() 426 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) in gart_iommu_hole_init() 433 ctl = read_pci_config(bus, slot, 3, in gart_iommu_hole_init() [all …]
|
D | vsmp_64.c | 33 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); in set_vsmp_ctl() 68 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) == in detect_vsmp_box() 111 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); in vsmp_cap_cpus()
|
D | early-quirks.c | 41 htcfg = read_pci_config(num, slot, func, 0x68); in fix_hypertransport_config() 126 d = read_pci_config(num, slot, func, 0x70); in ati_ixp4x0_rev() 130 d = read_pci_config(num, slot, func, 0x8); in ati_ixp4x0_rev() 165 d = read_pci_config(num, slot, func, 0x8); in ati_sbx00_rev() 191 d = read_pci_config(num, slot, func, 0x64); in ati_bugs_contd() 337 bsm = read_pci_config(num, slot, func, INTEL_BSM); in gen3_stolen_base() 347 bsm = read_pci_config(num, slot, func, INTEL_GEN11_BSM_DW0); in gen11_stolen_base() 349 bsm |= (u64)read_pci_config(num, slot, func, INTEL_GEN11_BSM_DW1) << 32; in gen11_stolen_base() 660 addr = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0); in apple_airport_reset() 661 addr |= (u64)read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_1) << 32; in apple_airport_reset()
|
D | mmconf-fam10h_64.c | 84 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); in get_fam10h_pci_mmconf_base() 124 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3)); in get_fam10h_pci_mmconf_base() 129 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); in get_fam10h_pci_mmconf_base()
|
D | early_printk.c | 262 cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND); in early_pci_serial_init() 263 classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION); in early_pci_serial_init() 264 bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0); in early_pci_serial_init()
|
/linux-6.12.1/arch/x86/pci/ |
D | amd_bus.c | 100 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); in early_root_info_init() 125 reg = read_pci_config(bus, slot, 1, in early_root_info_init() 152 reg = read_pci_config(bus, slot, 0, AMD_NB_F0_NODE_ID); in early_root_info_init() 154 reg = read_pci_config(bus, slot, 0, AMD_NB_F0_UNIT_ID); in early_root_info_init() 161 reg = read_pci_config(bus, slot, 1, 0xc0 + (i << 3)); in early_root_info_init() 166 reg = read_pci_config(bus, slot, 1, 0xc4 + (i << 3)); in early_root_info_init() 227 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3)); in early_root_info_init() 233 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); in early_root_info_init() 363 u32 val = read_pci_config(bus, slot, 3, 0); in pci_enable_pci_io_ecs() 368 val = read_pci_config(bus, slot, 3, 0x8c); in pci_enable_pci_io_ecs()
|
D | early.c | 11 u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) in read_pci_config() function
|
D | broadcom_bus.c | 100 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); in broadcom_postcore_init()
|
/linux-6.12.1/arch/x86/mm/ |
D | amdtopology.c | 39 header = read_pci_config(0, num, 0, 0x00); in find_northbridge() 45 header = read_pci_config(0, num, 1, 0x00); in find_northbridge() 73 reg = read_pci_config(0, nb, 0, 0x60); in amd_numa_init() 84 base = read_pci_config(0, nb, 1, 0x40 + i*8); in amd_numa_init() 85 limit = read_pci_config(0, nb, 1, 0x44 + i*8); in amd_numa_init()
|
/linux-6.12.1/arch/powerpc/kernel/ |
D | rtas_pci.c | 31 static int read_pci_config; variable 68 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); in rtas_pci_dn_read_config() 194 read_pci_config = rtas_function_token(RTAS_FN_READ_PCI_CONFIG); in init_pci_config_tokens()
|
/linux-6.12.1/drivers/usb/early/ |
D | ehci-dbgp.c | 394 class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION); in __find_dbgp() 682 dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, in nvidia_set_debug_port() 695 vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, in detect_set_debug_port() 719 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot, in early_ehci_bios_handoff() 734 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot, in early_ehci_bios_handoff() 851 debug_port = read_pci_config(bus, slot, func, cap); in early_dbgp_init() 862 bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0); in early_dbgp_init()
|
D | xhci-dbc.c | 45 val = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0); in xdbc_map_pci_mmio() 47 sz = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0); in xdbc_map_pci_mmio() 60 val = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0 + 4); in xdbc_map_pci_mmio() 62 sz = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0 + 4); in xdbc_map_pci_mmio() 115 class = read_pci_config(bus, dev, func, PCI_CLASS_REVISION); in xdbc_find_dbgp()
|
/linux-6.12.1/drivers/firewire/ |
D | init_ohci1394_dma.c | 243 ohci_base = read_pci_config(num, slot, func, PCI_BASE_ADDRESS_0+(0<<2)) in init_ohci1394_controller() 269 class = read_pci_config(num, slot, func, in init_ohci1394_dma_on_all_controllers()
|
/linux-6.12.1/arch/x86/include/asm/ |
D | pci-direct.h | 10 extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
|
/linux-6.12.1/arch/x86/kernel/cpu/ |
D | amd.c | 585 val = read_pci_config(0, 24, 0, 0x68); in early_init_amd()
|
/linux-6.12.1/drivers/iommu/amd/ |
D | init.c | 3185 pci_id = read_pci_config(0, i, 0, 0); in detect_ivrs()
|