Searched refs:rb_mask (Results 1 – 5 of 5) sorted by relevance
1359 u32 raster_config, unsigned rb_mask, in gfx_v6_0_write_harvested_raster_configs() argument1369 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1370 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1371 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1372 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1393 pkr0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1394 pkr1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1408 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1409 rb1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1424 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()[all …]
1634 unsigned rb_mask, unsigned num_rb) in gfx_v7_0_write_harvested_raster_configs() argument1643 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1644 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1645 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1646 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1681 pkr0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1682 pkr1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1697 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1698 rb1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1714 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()[all …]
3482 unsigned rb_mask, unsigned num_rb) in gfx_v8_0_write_harvested_raster_configs() argument3491 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3492 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3493 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3494 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3529 pkr0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3530 pkr1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3545 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3546 rb1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3562 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()[all …]
1577 u32 rb_mask; in gfx_v12_0_get_rb_active_bitmap() local1587 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v12_0_get_rb_active_bitmap()1590 return rb_mask & (~(gc_disabled_rb_mask | gc_user_disabled_rb_mask)); in gfx_v12_0_get_rb_active_bitmap()
1817 u32 rb_mask; in gfx_v11_0_get_rb_active_bitmap() local1827 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v11_0_get_rb_active_bitmap()1830 return rb_mask & (~(gc_disabled_rb_mask | gc_user_disabled_rb_mask)); in gfx_v11_0_get_rb_active_bitmap()