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Searched refs:rFPGA0_XB_HSSIParameter2 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h57 #define rFPGA0_XB_HSSIParameter2 0x82c macro
/linux-6.12.1/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c116 tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord); in phy_RFSerialRead_8723B()
118 …PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
325 …pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2… in phy_InitBBRFRegisterDefinition()
/linux-6.12.1/drivers/staging/rtl8712/
Drtl871x_mp.c424 set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); in r8712_SwitchAntenna()
431 set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in r8712_SwitchAntenna()
438 set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in r8712_SwitchAntenna()
Drtl871x_mp_phy_regdef.h95 #define rFPGA0_XB_HSSIParameter2 0x82c macro
/linux-6.12.1/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h51 #define rFPGA0_XB_HSSIParameter2 0x82c macro
Dr8192E_phy.c317 priv->phy_reg_def[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; in _rtl92e_init_bb_rf_reg_def()