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Searched refs:rFPGA0_TxGainStage (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h47 #define rFPGA0_TxGainStage 0x80c macro
Dr8192E_phy.c409 rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, in _rtl92e_bb_config_para_file()
/linux-6.12.1/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h89 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
Drtl871x_mp.c319 set_bb_reg(pAdapter, rFPGA0_TxGainStage, in r8712_SetTxAGCOffset()