Searched refs:postdiv2 (Results 1 – 9 of 9) sorted by relevance
| /linux-6.12.1/drivers/clk/sophgo/ |
| D | clk-sg2042-pll.c | 80 unsigned int postdiv2; member
92 FIELD_PREP(PLLCTRL_POSTDIV2_MASK, ctrl->postdiv2) | in sg2042_pll_ctrl_encode()
103 ctrl->postdiv2 = FIELD_GET(PLLCTRL_POSTDIV2_MASK, reg_value); in sg2042_pll_ctrl_decode()
157 denominator = ctrl_table.refdiv * ctrl_table.postdiv1 * ctrl_table.postdiv2; in sg2042_pll_recalc_rate()
191 unsigned int *postdiv2) in sg2042_pll_get_postdiv_1_2() argument
221 *postdiv2 = 1; in sg2042_pll_get_postdiv_1_2()
232 *postdiv2 = postdiv1_2[index][0]; in sg2042_pll_get_postdiv_1_2()
256 unsigned int fbdiv, refdiv, postdiv1, postdiv2; in sg2042_get_pll_ctl_setting() local
293 &postdiv1, &postdiv2); in sg2042_get_pll_ctl_setting()
302 do_div(tmp, (postdiv1 * postdiv2)); in sg2042_get_pll_ctl_setting()
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| /linux-6.12.1/drivers/clk/pistachio/ |
| D | clk-pll.c | 241 params->postdiv2 != old_postdiv2)) in pll_gf40lp_frac_set_rate()
244 if (params->postdiv2 > params->postdiv1) in pll_gf40lp_frac_set_rate()
254 (params->postdiv2 << PLL_FRAC_CTRL2_POSTDIV2_SHIFT); in pll_gf40lp_frac_set_rate()
273 u64 val, prediv, fbdiv, frac, postdiv1, postdiv2, rate; in pll_gf40lp_frac_recalc_rate() local
282 postdiv2 = (val >> PLL_FRAC_CTRL2_POSTDIV2_SHIFT) & in pll_gf40lp_frac_recalc_rate()
293 rate = do_div_round_closest(rate, (prediv * postdiv1 * postdiv2) << 24); in pll_gf40lp_frac_recalc_rate()
387 params->postdiv2 != old_postdiv2)) in pll_gf40lp_laint_set_rate()
390 if (params->postdiv2 > params->postdiv1) in pll_gf40lp_laint_set_rate()
400 (params->postdiv2 << PLL_INT_CTRL1_POSTDIV2_SHIFT); in pll_gf40lp_laint_set_rate()
413 u32 val, prediv, fbdiv, postdiv1, postdiv2; in pll_gf40lp_laint_recalc_rate() local
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| D | clk.h | 100 unsigned long long postdiv2; member
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| /linux-6.12.1/drivers/clk/rockchip/ |
| D | clk-pll.c | 153 rate->postdiv2 = ((pllcon >> RK3036_PLLCON1_POSTDIV2_SHIFT) in rockchip_rk3036_pll_get_params()
184 do_div(rate64, cur.postdiv2); in rockchip_rk3036_pll_recalc_rate()
202 rate->postdiv2, rate->dsmpd, rate->frac); in rockchip_rk3036_pll_set_params()
222 HIWORD_UPDATE(rate->postdiv2, RK3036_PLLCON1_POSTDIV2_MASK, in rockchip_rk3036_pll_set_params()
318 cur.fbdiv, cur.postdiv1, cur.refdiv, cur.postdiv2, in rockchip_rk3036_pll_init()
321 rate->fbdiv, rate->postdiv1, rate->refdiv, rate->postdiv2, in rockchip_rk3036_pll_init()
325 rate->refdiv != cur.refdiv || rate->postdiv2 != cur.postdiv2 || in rockchip_rk3036_pll_init()
633 rate->postdiv2 = ((pllcon >> RK3399_PLLCON1_POSTDIV2_SHIFT) in rockchip_rk3399_pll_get_params()
666 do_div(rate64, cur.postdiv2); in rockchip_rk3399_pll_recalc_rate()
684 rate->postdiv2, rate->dsmpd, rate->frac); in rockchip_rk3399_pll_set_params()
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| D | clk.h | 352 .postdiv2 = _postdiv2, \
415 unsigned int postdiv2; member
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| /linux-6.12.1/drivers/clk/visconti/ |
| D | pll.h | 34 .postdiv2 = _postdiv2 \
45 unsigned int postdiv2; member
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| D | pll.c | 49 #define PLL_CREATE_OSTDIV(table) (table->postdiv2 << 4 | table->postdiv1)
72 rate_table->postdiv2 = (postdiv >> 4) & PLL_POSTDIV_MASK; in visconti_pll_get_params()
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| /linux-6.12.1/drivers/gpu/drm/msm/dsi/phy/ |
| D | dsi_phy_28nm_8960.c | 51 u8 postdiv2; member
346 cached_state->postdiv2 = in dsi_28nm_pll_save_state()
370 writel(cached_state->postdiv2, base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9); in dsi_28nm_pll_restore_state()
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| /linux-6.12.1/drivers/clk/ |
| D | clk-bm1880.c | 478 u32 postdiv1, postdiv2, denominator; in bm1880_pll_rate_calc() local
483 postdiv2 = (regval >> 12) & 0x7; in bm1880_pll_rate_calc()
486 denominator = refdiv * postdiv1 * postdiv2; in bm1880_pll_rate_calc()
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