| /linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/lag/ |
| D | port_sel.c | 363 struct mlx5_lag_port_sel *port_sel = &ldev->port_sel; in mlx5_lag_destroy_definers() local
366 for_each_set_bit(tt, port_sel->tt_map, MLX5_NUM_TT) { in mlx5_lag_destroy_definers()
367 if (port_sel->outer.definers[tt]) in mlx5_lag_destroy_definers()
369 port_sel->outer.definers[tt]); in mlx5_lag_destroy_definers()
370 if (port_sel->inner.definers[tt]) in mlx5_lag_destroy_definers()
372 port_sel->inner.definers[tt]); in mlx5_lag_destroy_definers()
380 struct mlx5_lag_port_sel *port_sel = &ldev->port_sel; in mlx5_lag_create_definers() local
384 for_each_set_bit(tt, port_sel->tt_map, MLX5_NUM_TT) { in mlx5_lag_create_definers()
391 port_sel->outer.definers[tt] = lag_definer; in mlx5_lag_create_definers()
393 if (!port_sel->tunnel) in mlx5_lag_create_definers()
[all …]
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| D | lag.h | 71 struct mlx5_lag_port_sel port_sel; member
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| /linux-6.12.1/drivers/scsi/cxlflash/ |
| D | lunmgt.c | 253 lli->port_sel |= CHAN2PORTMASK(chan); in cxlflash_manage_lun()
265 lli->port_sel &= ~CHAN2PORTMASK(chan); in cxlflash_manage_lun()
266 if (lli->port_sel == 0U) in cxlflash_manage_lun()
272 __func__, lli->port_sel, chan, lli->lun_id[chan]); in cxlflash_manage_lun()
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| D | vlun.c | 577 lli->port_sel)); in grow_lxt()
849 if (lli->port_sel & (1 << k)) { in cxlflash_restore_luntable()
899 nports = get_num_ports(lli->port_sel); in init_luntable()
912 if (!(lli->port_sel & (1 << k))) in init_luntable()
925 if (!(lli->port_sel & (1 << k))) in init_luntable()
939 chan = PORTMASK2CHAN(lli->port_sel); in init_luntable()
1058 if (get_num_ports(lli->port_sel) > 1) in cxlflash_disk_virtual_open()
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| D | sislite.h | 48 u32 port_sel; /* this is a selection mask: member
523 u8 port_sel; member
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| D | superpipe.h | 58 u32 port_sel; /* What port to use for this LUN */ member
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| D | main.c | 501 cmd->rcb.port_sel = CHAN2PORTMASK(sdev->channel); in send_tmf()
629 cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); in cxlflash_queuecommand()
1233 u64 port_sel; in afu_link_reset() local
1236 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel); in afu_link_reset()
1237 port_sel &= ~(1ULL << port); in afu_link_reset()
1238 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); in afu_link_reset()
1254 port_sel |= (1ULL << port); in afu_link_reset()
1255 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); in afu_link_reset()
1258 dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel); in afu_link_reset()
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| D | superpipe.c | 528 u32 port_sel) in rht_format1() argument
552 dummy.port_sel = port_sel; in rht_format1()
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| /linux-6.12.1/drivers/gpu/drm/rockchip/ |
| D | rockchip_drm_vop2.c | 2310 u32 port_sel; in vop2_setup_layer_mixer() local
2328 port_sel = vop2_readl(vop2, RK3568_OVL_PORT_SEL); in vop2_setup_layer_mixer()
2329 port_sel &= RK3568_OVL_PORT_SEL__SEL_PORT; in vop2_setup_layer_mixer()
2332 port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT0_MUX, in vop2_setup_layer_mixer()
2335 port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT0_MUX, 8); in vop2_setup_layer_mixer()
2338 port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX, in vop2_setup_layer_mixer()
2341 port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX, 8); in vop2_setup_layer_mixer()
2344 port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX, in vop2_setup_layer_mixer()
2347 port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX, 8); in vop2_setup_layer_mixer()
2361 port_sel &= ~RK3568_OVL_PORT_SEL__CLUSTER0; in vop2_setup_layer_mixer()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_pps.c | 301 u32 port_sel = intel_de_read(display, in vlv_initial_pps_pipe() local
305 if (port_sel != PANEL_PORT_SELECT_VLV(port)) in vlv_initial_pps_pipe()
1514 u32 pp_on, pp_off, port_sel = 0; in pps_init_registers() local
1559 port_sel = PANEL_PORT_SELECT_VLV(port); in pps_init_registers()
1563 port_sel = PANEL_PORT_SELECT_DPA; in pps_init_registers()
1566 port_sel = PANEL_PORT_SELECT_DPC; in pps_init_registers()
1569 port_sel = PANEL_PORT_SELECT_DPD; in pps_init_registers()
1577 pp_on |= port_sel; in pps_init_registers()
1765 u32 port_sel; in assert_pps_unlocked() local
1768 port_sel = intel_de_read(display, PP_ON_DELAYS(display, 0)) & in assert_pps_unlocked()
[all …]
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| /linux-6.12.1/drivers/ata/ |
| D | pata_icside.c | 56 u8 port_sel; member
240 writeb(state->port[ap->port_no].port_sel, state->ioc_base); in pata_icside_bmdma_setup()
425 state->port[0].port_sel = sel; in pata_icside_register_v6()
426 state->port[1].port_sel = sel | 1; in pata_icside_register_v6()
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| /linux-6.12.1/drivers/i2c/busses/ |
| D | i2c-piix4.c | 393 u8 smb_en, smb_en_status, port_sel; in piix4_setup_sb800() local
483 port_sel = inb_p(SB800_PIIX4_SMB_IDX + 1); in piix4_setup_sb800()
484 piix4_port_sel_sb800 = (port_sel & 0x01) ? in piix4_setup_sb800()
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| /linux-6.12.1/drivers/rapidio/ |
| D | rio.c | 1485 u32 port_sel = RIO_INVALID_ROUTE; in rio_std_route_clr_table() local
1501 port_sel = (RIO_INVALID_ROUTE << 24) | in rio_std_route_clr_table()
1513 port_sel); in rio_std_route_clr_table()
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| /linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/ |
| D | Makefile | 41 mlx5_core-$(CONFIG_MLX5_ESWITCH) += lag/mp.o lag/port_sel.o lib/geneve.o lib/port_tun.o \
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| /linux-6.12.1/drivers/net/wireless/realtek/rtw89/ |
| D | mac_be.c | 2100 u8 port_sel = rtwvif->port; in rtw89_mac_set_csi_para_reg_be() local
2145 if (port_sel == 0) in rtw89_mac_set_csi_para_reg_be()
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| D | mac.c | 5940 u8 port_sel = rtwvif->port; in rtw89_mac_set_csi_para_reg_ax() local
5981 if (port_sel == 0) in rtw89_mac_set_csi_para_reg_ax()
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