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Searched refs:port_base (Results 1 – 20 of 20) sorted by relevance

/linux-6.12.1/drivers/net/ethernet/silan/
Dsc92031.c266 void __iomem *port_base; member
309 static inline void _sc92031_dummy_read(void __iomem *port_base) in _sc92031_dummy_read() argument
311 ioread32(port_base + MAC0); in _sc92031_dummy_read()
314 static u32 _sc92031_mii_wait(void __iomem *port_base) in _sc92031_mii_wait() argument
320 mii_status = ioread32(port_base + Miistatus); in _sc92031_mii_wait()
326 static u32 _sc92031_mii_cmd(void __iomem *port_base, u32 cmd0, u32 cmd1) in _sc92031_mii_cmd() argument
328 iowrite32(Mii_Divider, port_base + Miicmd0); in _sc92031_mii_cmd()
330 _sc92031_mii_wait(port_base); in _sc92031_mii_cmd()
332 iowrite32(cmd1, port_base + Miicmd1); in _sc92031_mii_cmd()
333 iowrite32(Mii_Divider | cmd0, port_base + Miicmd0); in _sc92031_mii_cmd()
[all …]
/linux-6.12.1/drivers/scsi/pcmcia/
Dsym53c500_cs.c356 int port_base = dev->io_port; in SYM53C500_intr() local
367 REG1(port_base); in SYM53C500_intr()
368 pio_status = inb(port_base + PIO_STATUS); in SYM53C500_intr()
369 REG0(port_base); in SYM53C500_intr()
370 status = inb(port_base + STAT_REG); in SYM53C500_intr()
371 DEB(seq_reg = inb(port_base + SEQ_REG)); in SYM53C500_intr()
372 int_reg = inb(port_base + INT_REG); in SYM53C500_intr()
373 DEB(fifo_size = inb(port_base + FIFO_FLAGS) & 0x1f); in SYM53C500_intr()
424 outb(FLUSH_FIFO, port_base + CMD_REG); in SYM53C500_intr()
425 LOAD_DMA_COUNT(port_base, scsi_bufflen(curSC)); /* Max transfer size */ in SYM53C500_intr()
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/linux-6.12.1/drivers/ata/
Dsata_inic162x.c271 static void inic_reset_port(void __iomem *port_base) in inic_reset_port() argument
273 void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; in inic_reset_port()
288 writeb(0xff, port_base + PORT_IRQ_STAT); in inic_reset_port()
319 void __iomem *port_base = inic_port_base(ap); in inic_stop_idma() local
321 readb(port_base + PORT_RPQ_FIFO); in inic_stop_idma()
322 readb(port_base + PORT_RPQ_CNT); in inic_stop_idma()
323 writew(0, port_base + PORT_IDMA_CTL); in inic_stop_idma()
384 void __iomem *port_base = inic_port_base(ap); in inic_host_intr() local
390 irq_stat = readb(port_base + PORT_IRQ_STAT); in inic_host_intr()
391 writeb(irq_stat, port_base + PORT_IRQ_STAT); in inic_host_intr()
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Dpdc_adma.c585 void __iomem *port_base = ADMA_ATA_REGS(mmio_base, port_no); in adma_ata_init_one() local
586 unsigned int offset = port_base - mmio_base; in adma_ata_init_one()
588 adma_ata_setup_port(&ap->ioaddr, port_base); in adma_ata_init_one()
Dsata_mv.c1258 void __iomem *port_base; in mv_dump_all_regs() local
1282 port_base = mv_port_base(mmio_base, p); in mv_dump_all_regs()
1284 mv_dump_mem(&pdev->dev, port_base, 0x54); in mv_dump_all_regs()
1286 mv_dump_mem(&pdev->dev, port_base+0x300, 0x60); in mv_dump_all_regs()
/linux-6.12.1/drivers/net/ethernet/ti/
Dam65-cpsw-qos.c47 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_CIR(prio)); in am65_cpsw_tx_pn_shaper_reset()
48 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_EIR(prio)); in am65_cpsw_tx_pn_shaper_reset()
87 port->port_base + AM65_CPSW_PN_REG_PRI_CIR(prio)); in am65_cpsw_tx_pn_shaper_apply()
99 port->port_base + AM65_CPSW_PN_REG_PRI_EIR(prio)); in am65_cpsw_tx_pn_shaper_apply()
198 writel(0, port->port_base + AM65_CPSW_PN_REG_TX_PRI_MAP); in am65_cpsw_reset_tc_mqprio()
260 writel(tx_prio_map, port->port_base + AM65_CPSW_PN_REG_TX_PRI_MAP); in am65_cpsw_setup_mqprio()
288 writel(val, port->port_base + AM65_CPSW_PN_REG_IET_VERIFY); in am65_cpsw_iet_set_verify_timeout_count()
303 ctrl = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL); in am65_cpsw_iet_verify_wait()
305 writel(ctrl, port->port_base + AM65_CPSW_PN_REG_IET_CTRL); in am65_cpsw_iet_verify_wait()
308 ctrl = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL); in am65_cpsw_iet_verify_wait()
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Dam65-cpsw-ethtool.c759 val = readl(port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_port_iet_rx_enable()
765 writel(val, port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_port_iet_rx_enable()
773 val = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL); in am65_cpsw_port_iet_tx_enable()
779 writel(val, port->port_base + AM65_CPSW_PN_REG_IET_CTRL); in am65_cpsw_port_iet_tx_enable()
794 iet_ctrl = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL); in am65_cpsw_get_mm()
795 port_ctrl = readl(port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_get_mm()
800 iet_status = readl(port->port_base + AM65_CPSW_PN_REG_IET_STATUS); in am65_cpsw_get_mm()
856 iet->original_max_blks = readl(port->port_base + AM65_CPSW_PN_REG_MAX_BLKS); in am65_cpsw_set_mm()
859 port->port_base + AM65_CPSW_PN_REG_MAX_BLKS); in am65_cpsw_set_mm()
863 port->port_base + AM65_CPSW_PN_REG_MAX_BLKS); in am65_cpsw_set_mm()
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Dam65-cpsw-nuss.c175 writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H); in am65_cpsw_port_set_sl_mac()
176 writel(mac_lo, slave->port_base + AM65_CPSW_PORTN_REG_SA_L); in am65_cpsw_port_set_sl_mac()
184 port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN); in am65_cpsw_sl_ctl_reset()
379 val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL); in am65_cpsw_nuss_set_p0_ptype()
393 writel(pri_map, host_p->port_base + AM65_CPSW_PORT_REG_RX_PRI_MAP); in am65_cpsw_nuss_set_p0_ptype()
394 writel(val, host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL); in am65_cpsw_nuss_set_p0_ptype()
637 host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN); in am65_cpsw_nuss_common_open()
640 host_p->port_base + AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET); in am65_cpsw_nuss_common_open()
642 host_p->port_base + AM65_CPSW_P0_REG_CTL); in am65_cpsw_nuss_common_open()
1843 writel(seq_id, port->port_base + AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG); in am65_cpsw_nuss_hwtstamp_set()
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Dam65-cpsw-nuss.h48 void __iomem *port_base; member
72 void __iomem *port_base; member
Dam65-cpsw-switchdev.c124 pvid = readl(port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET); in am65_cpsw_get_pvid()
126 pvid = readl(host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET); in am65_cpsw_get_pvid()
144 writel(pvid, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET); in am65_cpsw_set_pvid()
146 writel(pvid, host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET); in am65_cpsw_set_pvid()
/linux-6.12.1/drivers/phy/mediatek/
Dphy-mtk-xsphy.c86 void __iomem *port_base; member
112 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate()
170 void __iomem *pbase = inst->port_base; in u2_phy_instance_init()
181 void __iomem *pbase = inst->port_base; in u2_phy_instance_power_on()
196 void __iomem *pbase = inst->port_base; in u2_phy_instance_power_off()
214 tmp = readl(inst->port_base + XSP_U2PHYDTM1); in u2_phy_instance_set_mode()
229 writel(tmp, inst->port_base + XSP_U2PHYDTM1); in u2_phy_instance_set_mode()
271 void __iomem *pbase = inst->port_base; in u2_phy_props_set()
293 void __iomem *pbase = inst->port_base; in u3_phy_props_set()
497 inst->port_base = devm_ioremap_resource(&phy->dev, &res); in mtk_xsphy_probe()
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Dphy-mtk-tphy.c312 void __iomem *port_base; member
1097 u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM; in phy_v1_banks_init()
1103 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; in phy_v1_banks_init()
1104 u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA; in phy_v1_banks_init()
1107 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; in phy_v1_banks_init()
1123 u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC; in phy_v2_banks_init()
1124 u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ; in phy_v2_banks_init()
1125 u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM; in phy_v2_banks_init()
1129 u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC; in phy_v2_banks_init()
1130 u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP; in phy_v2_banks_init()
[all …]
/linux-6.12.1/drivers/media/pci/intel/ipu6/
Dipu6-isys-jsl-phy.c176 u32 port_base; in ipu6_isys_csi2_set_timing() local
179 port_base = (port % 2) ? CSI2_SIP_TOP_CSI_RX_PORT_BASE_1(port) : in ipu6_isys_csi2_set_timing()
184 reg = isys->pdata->base + port_base; in ipu6_isys_csi2_set_timing()
189 reg = isys->pdata->base + port_base; in ipu6_isys_csi2_set_timing()
194 reg = isys->pdata->base + port_base; in ipu6_isys_csi2_set_timing()
198 reg = isys->pdata->base + port_base; in ipu6_isys_csi2_set_timing()
/linux-6.12.1/drivers/net/ethernet/hisilicon/
Dhisi_femac.c109 void __iomem *port_base; member
161 val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK; in hisi_femac_xmit_reclaim()
176 val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK; in hisi_femac_xmit_reclaim()
204 writel(status, priv->port_base + MAC_PORTSET); in hisi_femac_adjust_link()
219 while (readl(priv->port_base + ADDRQ_STAT) & BIT_RX_READY) { in hisi_femac_rx_refill()
239 writel(addr, priv->port_base + IQ_ADDR); in hisi_femac_rx_refill()
255 rx_pkt_info = readl(priv->port_base + IQFRM_DES); in hisi_femac_rx()
507 val = readl(priv->port_base + ADDRQ_STAT); in hisi_femac_net_xmit()
538 writel(addr, priv->port_base + EQ_ADDR); in hisi_femac_net_xmit()
539 writel(skb->len + ETH_FCS_LEN, priv->port_base + EQFRM_LEN); in hisi_femac_net_xmit()
[all …]
/linux-6.12.1/drivers/phy/ralink/
Dphy-mt7621-pci.c81 void __iomem *port_base; member
276 mt7621_phy->port_base, mt7621_phy->has_dual_port); in mt7621_pcie_phy_of_xlate()
311 phy->port_base = devm_platform_ioremap_resource(pdev, 0); in mt7621_pci_phy_probe()
312 if (IS_ERR(phy->port_base)) { in mt7621_pci_phy_probe()
314 return PTR_ERR(phy->port_base); in mt7621_pci_phy_probe()
317 phy->regmap = devm_regmap_init_mmio(phy->dev, phy->port_base, in mt7621_pci_phy_probe()
/linux-6.12.1/drivers/net/dsa/
Ddsa_loop.c144 ret = mdiobus_read_nested(bus, ps->port_base + port, regnum); in dsa_loop_phy_read()
160 ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value); in dsa_loop_phy_write()
218 mdiobus_read(bus, ps->port_base + port, MII_BMSR); in dsa_loop_port_vlan_add()
247 mdiobus_read(bus, ps->port_base + port, MII_BMSR); in dsa_loop_port_vlan_del()
/linux-6.12.1/include/linux/dsa/
Dloop.h36 unsigned int port_base; member
/linux-6.12.1/drivers/net/wireless/realtek/rtw89/
Dmac.c4082 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_check_packet_ctrl()
4104 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_bcn_drop()
4137 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_func_sw()
4175 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tx_rpt()
4187 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_rpt()
4199 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_net_type()
4209 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_prct()
4223 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_sw()
4238 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_sync()
4259 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tx_sw()
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Dmac.h937 const struct rtw89_port_reg *port_base; member
Dmac_be.c2537 .port_base = &rtw89_port_base_be,