Searched refs:pmfw_breakdown (Results 1 – 7 of 7) sorted by relevance
30 …clk_mgr->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = dcfclk_mhz_for_the_secon… in dcn401_build_wm_range_table_fpu()32 …clk_mgr->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = clk_mgr->bw_params->clk_… in dcn401_build_wm_range_table_fpu()43 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn401_build_wm_range_table_fpu()44 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn401_build_wm_range_table_fpu()45 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table_fpu()46 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn401_build_wm_range_table_fpu()47 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table_fpu()55 clk_mgr->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn401_build_wm_range_table_fpu()56 clk_mgr->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table_fpu()57 clk_mgr->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_uclk = setb_min_uclk_mhz; in dcn401_build_wm_range_table_fpu()[all …]
747 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn3_fpu_build_wm_range_table()748 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table()749 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn3_fpu_build_wm_range_table()750 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn3_fpu_build_wm_range_table()751 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn3_fpu_build_wm_range_table()769 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE; in dcn3_fpu_build_wm_range_table()770 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table()771 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn3_fpu_build_wm_range_table()772 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn3_fpu_build_wm_range_table()773 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_uclk = 0xFFFF; in dcn3_fpu_build_wm_range_table()[all …]
341 …M_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.min_dcfclk; in dcn3_notify_wm_ranges()342 …M_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.max_dcfclk; in dcn3_notify_wm_ranges()343 …w[WM_DCEFCLK][i].MinUclk = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.min_uclk; in dcn3_notify_wm_ranges()344 …w[WM_DCEFCLK][i].MaxUclk = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.max_uclk; in dcn3_notify_wm_ranges()346 …kRow[WM_DCEFCLK][i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type; in dcn3_notify_wm_ranges()
182 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn401_build_wm_range_table()183 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn401_build_wm_range_table()184 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table()185 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn401_build_wm_range_table()186 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table()195 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE; in dcn401_build_wm_range_table()196 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn401_build_wm_range_table()197 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table()198 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn401_build_wm_range_table()199 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table()[all …]
203 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = dcfclk_mhz_for_the_… in dcn32_build_wm_range_table_fpu()205 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = clk_mgr->base.bw_pa… in dcn32_build_wm_range_table_fpu()216 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn32_build_wm_range_table_fpu()217 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn32_build_wm_range_table_fpu()218 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()219 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn32_build_wm_range_table_fpu()220 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()228 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn32_build_wm_range_table_fpu()229 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()230 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_uclk = setb_min_uclk_mhz; in dcn32_build_wm_range_table_fpu()[all …]
155 } pmfw_breakdown; member
986 …rks.WatermarkRow[i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type; in dcn32_notify_wm_ranges()