Searched refs:plla (Results 1 – 8 of 8) sorted by relevance
| /linux-6.12.1/arch/arm/boot/dts/vt8500/ |
| D | wm8650.dtsi | 85 plla: plla { label
123 clocks = <&plla>;
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| D | wm8505.dtsi | 88 plla: plla { label
119 clocks = <&plla>;
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| D | wm8850.dtsi | 88 plla: plla { label
140 clocks = <&plla>;
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| D | wm8750.dtsi | 91 plla: plla { label
129 clocks = <&plla>;
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | vt8500.txt | 59 plla: plla {
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| /linux-6.12.1/drivers/clk/tegra/ |
| D | clk-tegra210.c | 831 static void tegra210_plla_set_defaults(struct tegra_clk_pll *plla) in tegra210_plla_set_defaults() argument
834 u32 val = readl_relaxed(clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
836 plla->params->defaults_set = true; in tegra210_plla_set_defaults()
845 plla->params->defaults_set = false; in tegra210_plla_set_defaults()
852 _pll_misc_chk_default(clk_base, plla->params, 0, val, in tegra210_plla_set_defaults()
856 _pll_misc_chk_default(clk_base, plla->params, 2, val, in tegra210_plla_set_defaults()
860 val = readl_relaxed(clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
863 writel_relaxed(val, clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
871 writel_relaxed(val, clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
873 clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
[all …]
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| /linux-6.12.1/arch/arm/boot/dts/renesas/ |
| D | r8a7778.dtsi | 503 clock-output-names = "plla", "pllb", "b",
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| D | r8a7779.dtsi | 585 clock-output-names = "plla", "z", "zs", "s",
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