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Searched refs:pll_lim (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/nouveau/dispnv04/
Dhw.c171 struct nvbios_pll pll_lim; in nouveau_hw_get_pllvals() local
174 ret = nvbios_pll_parse(bios, plltype, &pll_lim); in nouveau_hw_get_pllvals()
175 if (ret || !(reg1 = pll_lim.reg)) in nouveau_hw_get_pllvals()
200 pllvals->refclk = pll_lim.refclk; in nouveau_hw_get_pllvals()
263 struct nvbios_pll pll_lim; in nouveau_hw_fix_bad_vpll() local
267 if (nvbios_pll_parse(bios, pll, &pll_lim)) in nouveau_hw_fix_bad_vpll()
271 if (pv.M1 >= pll_lim.vco1.min_m && pv.M1 <= pll_lim.vco1.max_m && in nouveau_hw_fix_bad_vpll()
272 pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n && in nouveau_hw_fix_bad_vpll()
273 pv.log2P <= pll_lim.max_p) in nouveau_hw_fix_bad_vpll()
279 pv.M1 = pll_lim.vco1.max_m; in nouveau_hw_fix_bad_vpll()
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Dcrtc.c127 struct nvbios_pll pll_lim; in nv_crtc_calc_state_ext() local
130 &pll_lim)) in nv_crtc_calc_state_ext()
146 if (drm->client.device.info.chipset > 0x40 && dot_clock <= (pll_lim.vco1.max_freq / 2)) in nv_crtc_calc_state_ext()
147 memset(&pll_lim.vco2, 0, sizeof(pll_lim.vco2)); in nv_crtc_calc_state_ext()
150 if (!clk->pll_calc(clk, &pll_lim, dot_clock, pv)) in nv_crtc_calc_state_ext()