Searched refs:pll_in_use (Results 1 – 6 of 6) sorted by relevance
1728 u32 pll_in_use = 0; in radeon_get_pll_use_mask() local1736 pll_in_use |= (1 << test_radeon_crtc->pll_id); in radeon_get_pll_use_mask()1738 return pll_in_use; in radeon_get_pll_use_mask()1869 u32 pll_in_use; in radeon_atom_pick_pll() local1893 pll_in_use = radeon_get_pll_use_mask(crtc); in radeon_atom_pick_pll()1894 if (!(pll_in_use & (1 << ATOM_PPLL2))) in radeon_atom_pick_pll()1896 if (!(pll_in_use & (1 << ATOM_PPLL1))) in radeon_atom_pick_pll()1902 pll_in_use = radeon_get_pll_use_mask(crtc); in radeon_atom_pick_pll()1903 if (!(pll_in_use & (1 << ATOM_PPLL2))) in radeon_atom_pick_pll()1905 if (!(pll_in_use & (1 << ATOM_PPLL1))) in radeon_atom_pick_pll()[all …]
274 u32 pll_in_use = 0; in amdgpu_pll_get_use_mask() local282 pll_in_use |= (1 << test_amdgpu_crtc->pll_id); in amdgpu_pll_get_use_mask()284 return pll_in_use; in amdgpu_pll_get_use_mask()
2156 u32 pll_in_use; in dce_v8_0_pick_pll() local2179 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v8_0_pick_pll()2180 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v8_0_pick_pll()2182 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v8_0_pick_pll()2188 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v8_0_pick_pll()2189 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v8_0_pick_pll()2191 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v8_0_pick_pll()2193 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v8_0_pick_pll()
2289 u32 pll_in_use; in dce_v11_0_pick_pll() local2343 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v11_0_pick_pll()2345 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v11_0_pick_pll()2347 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v11_0_pick_pll()2352 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v11_0_pick_pll()2354 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v11_0_pick_pll()2356 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v11_0_pick_pll()
2248 u32 pll_in_use; in dce_v10_0_pick_pll() local2269 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v10_0_pick_pll()2270 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v10_0_pick_pll()2272 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v10_0_pick_pll()2274 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v10_0_pick_pll()
2171 u32 pll_in_use; in dce_v6_0_pick_pll() local2188 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v6_0_pick_pll()2189 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v6_0_pick_pll()2191 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v6_0_pick_pll()