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Searched refs:pipe_pool (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/
Ddml2_dc_resource_mgmt.c55 struct dc_plane_pipe_pool pipe_pool; member
544 …ASSERT(scratch->pipe_pool.num_pipes_assigned_to_plane_for_mpcc_combine == 1 || scratch->pipe_pool.… in add_odm_slice_to_odm_tree()
546 for (i = 0; i < scratch->pipe_pool.num_pipes_assigned_to_plane_for_mpcc_combine; i++) { in add_odm_slice_to_odm_tree()
547 pipe = &state->res_ctx.pipe_ctx[scratch->pipe_pool.pipes_assigned_to_plane[odm_slice_index][i]]; in add_odm_slice_to_odm_tree()
561 struct dc_plane_pipe_pool *pipe_pool, in add_plane_to_blend_tree() argument
567 for (i = 0; i < pipe_pool->num_pipes_assigned_to_plane_for_mpcc_combine; i++) { in add_plane_to_blend_tree()
569 …top_pipe->bottom_pipe = &state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]]; in add_plane_to_blend_tree()
571 pipe_pool->pipe_used[odm_slice][i] = true; in add_plane_to_blend_tree()
573 state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]].top_pipe = top_pipe; in add_plane_to_blend_tree()
574 state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]].bottom_pipe = NULL; in add_plane_to_blend_tree()
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