| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_crtc_state_dump.c | 33 const struct intel_crtc_state *pipe_config, in intel_dump_m_n_config() argument
184 void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, in intel_crtc_state_dump() argument
188 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_crtc_state_dump()
203 str_yes_no(pipe_config->hw.enable), context); in intel_crtc_state_dump()
205 if (!pipe_config->hw.enable) in intel_crtc_state_dump()
208 snprintf_output_types(buf, sizeof(buf), pipe_config->output_types); in intel_crtc_state_dump()
210 str_yes_no(pipe_config->hw.active), in intel_crtc_state_dump()
211 buf, pipe_config->output_types, in intel_crtc_state_dump()
212 intel_output_format_name(pipe_config->output_format), in intel_crtc_state_dump()
213 intel_output_format_name(pipe_config->sink_format)); in intel_crtc_state_dump()
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| D | g4x_hdmi.c | 153 struct intel_crtc_state *pipe_config) in intel_hdmi_get_config() argument
161 pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI); in intel_hdmi_get_config()
176 pipe_config->has_hdmi_sink = true; in intel_hdmi_get_config()
178 pipe_config->infoframes.enable |= in intel_hdmi_get_config()
179 intel_hdmi_infoframes_enabled(encoder, pipe_config); in intel_hdmi_get_config()
181 if (pipe_config->infoframes.enable) in intel_hdmi_get_config()
182 pipe_config->has_infoframe = true; in intel_hdmi_get_config()
185 pipe_config->has_audio = true; in intel_hdmi_get_config()
189 pipe_config->limited_color_range = true; in intel_hdmi_get_config()
191 pipe_config->hw.adjusted_mode.flags |= flags; in intel_hdmi_get_config()
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| D | g4x_dp.c | 58 struct intel_crtc_state *pipe_config) in g4x_dp_set_clock() argument
80 if (pipe_config->port_clock == divisor[i].dot) { in g4x_dp_set_clock()
81 pipe_config->dpll = divisor[i]; in g4x_dp_set_clock()
82 pipe_config->clock_set = true; in g4x_dp_set_clock()
90 const struct intel_crtc_state *pipe_config) in intel_dp_prepare() argument
96 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dp_prepare()
97 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dp_prepare()
100 pipe_config->port_clock, in intel_dp_prepare()
101 pipe_config->lane_count); in intel_dp_prepare()
126 intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); in intel_dp_prepare()
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| D | intel_dp_mst.c | 577 struct intel_crtc_state *pipe_config, in intel_dp_mst_compute_config() argument
582 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dp_mst_compute_config()
588 &pipe_config->hw.adjusted_mode; in intel_dp_mst_compute_config()
593 if (pipe_config->fec_enable && in intel_dp_mst_compute_config()
594 !intel_dp_supports_fec(intel_dp, connector, pipe_config)) in intel_dp_mst_compute_config()
603 pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); in intel_dp_mst_compute_config()
605 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dp_mst_compute_config()
606 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dp_mst_compute_config()
607 pipe_config->has_pch_encoder = false; in intel_dp_mst_compute_config()
609 joiner_needs_dsc = intel_dp_joiner_needs_dsc(dev_priv, pipe_config->joiner_pipes); in intel_dp_mst_compute_config()
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| D | intel_dp.c | 1528 const struct intel_crtc_state *pipe_config) in intel_dp_source_supports_fec() argument
1537 !intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) in intel_dp_source_supports_fec()
1545 const struct intel_crtc_state *pipe_config) in intel_dp_supports_fec() argument
1547 return intel_dp_source_supports_fec(intel_dp, pipe_config) && in intel_dp_supports_fec()
1638 struct intel_crtc_state *pipe_config, in intel_dp_adjust_compliance_config() argument
1648 pipe_config->dither_force_disable = bpp == 6 * 3; in intel_dp_adjust_compliance_config()
1702 struct intel_crtc_state *pipe_config, in intel_dp_compute_link_config_wide() argument
1706 int bpp, i, lane_count, clock = intel_dp_mode_clock(pipe_config, conn_state); in intel_dp_compute_link_config_wide()
1712 int link_bpp = intel_dp_output_bpp(pipe_config->output_format, bpp); in intel_dp_compute_link_config_wide()
1731 pipe_config->lane_count = lane_count; in intel_dp_compute_link_config_wide()
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| D | intel_crt.c | 142 struct intel_crtc_state *pipe_config) in intel_crt_get_config() argument
144 pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG); in intel_crt_get_config()
146 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config()
148 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_crt_get_config()
152 struct intel_crtc_state *pipe_config) in hsw_crt_get_config() argument
154 lpt_pch_get_config(pipe_config); in hsw_crt_get_config()
156 hsw_ddi_get_config(encoder, pipe_config); in hsw_crt_get_config()
158 pipe_config->hw.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC | in hsw_crt_get_config()
162 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in hsw_crt_get_config()
393 struct intel_crtc_state *pipe_config, in intel_crt_compute_config() argument
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| D | intel_dvo.c | 160 struct intel_crtc_state *pipe_config) in intel_dvo_get_config() argument
166 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); in intel_dvo_get_config()
178 pipe_config->hw.adjusted_mode.flags |= flags; in intel_dvo_get_config()
180 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
200 const struct intel_crtc_state *pipe_config, in intel_enable_dvo() argument
208 &pipe_config->hw.mode, in intel_enable_dvo()
209 &pipe_config->hw.adjusted_mode); in intel_enable_dvo()
253 struct intel_crtc_state *pipe_config, in intel_dvo_compute_config() argument
258 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dvo_compute_config()
279 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dvo_compute_config()
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| D | icl_dsi.c | 278 const struct intel_crtc_state *pipe_config) in configure_dual_link_mode() argument
287 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in configure_dual_link_mode()
303 &pipe_config->hw.adjusted_mode; in configure_dual_link_mode()
680 const struct intel_crtc_state *pipe_config) in gen11_dsi_configure_transcoder() argument
684 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in gen11_dsi_configure_transcoder()
700 if (afe_clk(encoder, pipe_config) >= 1500 * 1000) { in gen11_dsi_configure_transcoder()
726 if (pipe_config->dsc.compression_enable) { in gen11_dsi_configure_transcoder()
794 configure_dual_link_mode(encoder, pipe_config); in gen11_dsi_configure_transcoder()
1194 const struct intel_crtc_state *pipe_config, in gen11_dsi_pre_enable() argument
1198 gen11_dsi_map_pll(encoder, pipe_config); in gen11_dsi_pre_enable()
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| D | intel_dp.h | 41 struct intel_crtc_state *pipe_config,
75 struct intel_crtc_state *pipe_config,
78 struct intel_crtc_state *pipe_config,
84 struct intel_crtc_state *pipe_config,
149 int intel_dp_dsc_sink_min_compressed_bpp(struct intel_crtc_state *pipe_config);
151 struct intel_crtc_state *pipe_config,
167 const struct intel_crtc_state *pipe_config);
173 const struct intel_crtc_state *pipe_config);
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| D | vlv_dsi.c | 268 struct intel_crtc_state *pipe_config, in intel_dsi_compute_config() argument
274 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dsi_compute_config()
278 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
279 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
285 ret = intel_panel_fitting(pipe_config, conn_state); in intel_dsi_compute_config()
296 pipe_config->pipe_bpp = 24; in intel_dsi_compute_config()
298 pipe_config->pipe_bpp = 18; in intel_dsi_compute_config()
302 pipe_config->mode_flags |= in intel_dsi_compute_config()
307 pipe_config->cpu_transcoder = TRANSCODER_DSI_C; in intel_dsi_compute_config()
309 pipe_config->cpu_transcoder = TRANSCODER_DSI_A; in intel_dsi_compute_config()
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| D | intel_display.c | 2836 struct intel_crtc_state *pipe_config) in intel_get_transcoder_timings() argument
2840 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; in intel_get_transcoder_timings()
2841 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_get_transcoder_timings()
2874 if (intel_pipe_is_interlaced(pipe_config)) { in intel_get_transcoder_timings()
2905 struct intel_crtc_state *pipe_config) in intel_get_pipe_src_size() argument
2913 drm_rect_init(&pipe_config->pipe_src, 0, 0, in intel_get_pipe_src_size()
2917 intel_joiner_adjust_pipe_src(pipe_config); in intel_get_pipe_src_size()
3047 struct intel_crtc_state *pipe_config) in i9xx_get_pipe_config() argument
3060 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in i9xx_get_pipe_config()
3061 pipe_config->sink_format = pipe_config->output_format; in i9xx_get_pipe_config()
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| D | intel_ddi.c | 377 static void ddi_dotclock_get(struct intel_crtc_state *pipe_config) in ddi_dotclock_get() argument
380 if (pipe_config->has_pch_encoder) in ddi_dotclock_get()
383 pipe_config->hw.adjusted_mode.crtc_clock = in ddi_dotclock_get()
384 intel_crtc_dotclock(pipe_config); in ddi_dotclock_get()
2367 struct intel_crtc_state *pipe_config) in intel_ddi_mso_get_config() argument
2369 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_ddi_mso_get_config()
2379 pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE; in intel_ddi_mso_get_config()
2380 if (!pipe_config->splitter.enable) in intel_ddi_mso_get_config()
2384 pipe_config->splitter.enable = false; in intel_ddi_mso_get_config()
2394 pipe_config->splitter.link_count = 2; in intel_ddi_mso_get_config()
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| D | intel_fdi.c | 184 struct intel_crtc_state *pipe_config, in ilk_check_fdi_lanes() argument
188 struct drm_atomic_state *state = pipe_config->uapi.state; in ilk_check_fdi_lanes()
196 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
197 if (pipe_config->fdi_lanes > 4) { in ilk_check_fdi_lanes()
200 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
205 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
208 pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
223 if (pipe_config->fdi_lanes <= 2) in ilk_check_fdi_lanes()
235 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
240 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
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| D | intel_pipe_crc.c | 283 struct intel_crtc_state *pipe_config; in intel_crtc_crc_setup_workarounds() local
300 pipe_config = intel_atomic_get_crtc_state(state, crtc); in intel_crtc_crc_setup_workarounds()
301 if (IS_ERR(pipe_config)) { in intel_crtc_crc_setup_workarounds()
302 ret = PTR_ERR(pipe_config); in intel_crtc_crc_setup_workarounds()
306 pipe_config->uapi.mode_changed = pipe_config->has_psr; in intel_crtc_crc_setup_workarounds()
307 pipe_config->crc_enabled = enable; in intel_crtc_crc_setup_workarounds()
310 pipe_config->hw.active && crtc->pipe == PIPE_A && in intel_crtc_crc_setup_workarounds()
311 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds()
312 pipe_config->uapi.mode_changed = true; in intel_crtc_crc_setup_workarounds()
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| D | intel_vdsc.c | 239 static int intel_dsc_slice_dimensions_valid(struct intel_crtc_state *pipe_config, in intel_dsc_slice_dimensions_valid() argument
242 if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_RGB || in intel_dsc_slice_dimensions_valid()
243 pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) { in intel_dsc_slice_dimensions_valid()
248 } else if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { in intel_dsc_slice_dimensions_valid()
262 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) in intel_dsc_compute_params() argument
264 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dsc_compute_params()
266 struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config; in intel_dsc_compute_params()
267 u16 compressed_bpp = fxp_q4_to_int(pipe_config->dsc.compressed_bpp_x16); in intel_dsc_compute_params()
271 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; in intel_dsc_compute_params()
273 pipe_config->dsc.slice_count); in intel_dsc_compute_params()
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| D | intel_hdmi.c | 257 const struct intel_crtc_state *pipe_config) in g4x_infoframes_enabled() argument
329 const struct intel_crtc_state *pipe_config) in ibx_infoframes_enabled() argument
332 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in ibx_infoframes_enabled()
407 const struct intel_crtc_state *pipe_config) in cpt_infoframes_enabled() argument
410 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in cpt_infoframes_enabled()
480 const struct intel_crtc_state *pipe_config) in vlv_infoframes_enabled() argument
483 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in vlv_infoframes_enabled()
556 const struct intel_crtc_state *pipe_config) in hsw_infoframes_enabled() argument
560 HSW_TVIDEO_DIP_CTL(display, pipe_config->cpu_transcoder)); in hsw_infoframes_enabled()
2306 struct intel_crtc_state *pipe_config, in intel_hdmi_compute_config() argument
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| D | intel_tv.c | 928 const struct intel_crtc_state *pipe_config, in intel_enable_tv() argument
934 intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc)); in intel_enable_tv()
1092 struct intel_crtc_state *pipe_config) in intel_tv_get_config() argument
1097 &pipe_config->hw.adjusted_mode; in intel_tv_get_config()
1105 pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT); in intel_tv_get_config()
1127 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config()
1154 intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock); in intel_tv_get_config()
1170 pipe_config->mode_flags |= in intel_tv_get_config()
1192 struct intel_crtc_state *pipe_config, in intel_tv_compute_config() argument
1197 to_intel_atomic_state(pipe_config->uapi.state); in intel_tv_compute_config()
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| D | intel_sdvo.c | 1282 static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) in i9xx_adjust_sdvo_tv_clock() argument
1284 struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev); in i9xx_adjust_sdvo_tv_clock()
1285 unsigned int dotclock = pipe_config->hw.adjusted_mode.crtc_clock; in i9xx_adjust_sdvo_tv_clock()
1286 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
1310 pipe_config->clock_set = true; in i9xx_adjust_sdvo_tv_clock()
1358 struct intel_crtc_state *pipe_config, in intel_sdvo_compute_config() argument
1365 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_sdvo_compute_config()
1366 struct drm_display_mode *mode = &pipe_config->hw.mode; in intel_sdvo_compute_config()
1369 pipe_config->has_pch_encoder = true; in intel_sdvo_compute_config()
1370 if (!intel_fdi_compute_pipe_bpp(pipe_config)) in intel_sdvo_compute_config()
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| D | g4x_dp.h | 24 struct intel_crtc_state *pipe_config);
40 struct intel_crtc_state *pipe_config) in g4x_dp_set_clock() argument
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| D | intel_lspcon.h | 35 const struct intel_crtc_state *pipe_config);
37 const struct intel_crtc_state *pipe_config);
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| D | intel_fdi.h | 21 const struct intel_crtc_state *pipe_config);
24 struct intel_crtc_state *pipe_config);
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| D | intel_vdsc.h | 22 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
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| D | intel_lspcon.c | 625 const struct intel_crtc_state *pipe_config) in lspcon_infoframes_enabled() argument
644 HSW_TVIDEO_DIP_CTL(display, pipe_config->cpu_transcoder)); in lspcon_infoframes_enabled()
691 const struct intel_crtc_state *pipe_config) in intel_lspcon_infoframes_enabled() argument
695 return dig_port->infoframes_enabled(encoder, pipe_config); in intel_lspcon_infoframes_enabled()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/ |
| D | dc_dmub_srv.c | 587 pipe_data->pipe_config.vblank_data.drr_info.drr_in_use = true; in populate_subvp_cmd_drr_info()
588 pipe_data->pipe_config.vblank_data.drr_info.use_ramping = false; // for now don't use ramping in populate_subvp_cmd_drr_info()
589 …pipe_data->pipe_config.vblank_data.drr_info.drr_window_size_ms = 4; // hardcode 4ms DRR window for… in populate_subvp_cmd_drr_info()
620 pipe_data->pipe_config.vblank_data.drr_info.min_vtotal_supported = min_vtotal_supported; in populate_subvp_cmd_drr_info()
621 pipe_data->pipe_config.vblank_data.drr_info.max_vtotal_supported = max_vtotal_supported; in populate_subvp_cmd_drr_info()
622 …pipe_data->pipe_config.vblank_data.drr_info.drr_vblank_start_margin = dc->caps.subvp_drr_vblank_st… in populate_subvp_cmd_drr_info()
666 pipe_data->pipe_config.vblank_data.pix_clk_100hz = vblank_pipe->stream->timing.pix_clk_100hz; in populate_subvp_cmd_vblank_pipe_info()
667 pipe_data->pipe_config.vblank_data.vblank_start = vblank_pipe->stream->timing.v_total - in populate_subvp_cmd_vblank_pipe_info()
669 pipe_data->pipe_config.vblank_data.vtotal = vblank_pipe->stream->timing.v_total; in populate_subvp_cmd_vblank_pipe_info()
670 pipe_data->pipe_config.vblank_data.htotal = vblank_pipe->stream->timing.h_total; in populate_subvp_cmd_vblank_pipe_info()
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| /linux-6.12.1/drivers/usb/renesas_usbhs/ |
| D | pipe.c | 477 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhsp_setup_pipebuff() local
489 buff_size = pipe_config->bufsize; in usbhsp_setup_pipebuff()
490 bufnmb = pipe_config->bufnum; in usbhsp_setup_pipebuff()
507 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhs_pipe_config_update() local
509 u16 dblb = pipe_config->double_buf ? DBLB : 0; in usbhs_pipe_config_update()
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