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Searched refs:pin_base (Results 1 – 25 of 46) sorted by relevance

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/linux-6.12.1/drivers/pinctrl/intel/
Dpinctrl-tangier.h37 unsigned int pin_base; member
46 .pin_base = (s), \
53 .pin_base = (s), \
Dpinctrl-intel.h122 unsigned int pin_base; member
155 .pin_base = (s), \
Dpinctrl-intel-platform.c170 community->pin_base = pins.npins; in intel_platform_pinctrl_prepare_soc_data()
176 community->npins = pins.npins - community->pin_base; in intel_platform_pinctrl_prepare_soc_data()
Dpinctrl-tangier.c66 #define pin_to_bufno(f, p) ((p) - (f)->pin_base)
76 if (pin >= family->pin_base && in tng_get_family()
77 pin < family->pin_base + family->npins) in tng_get_family()
/linux-6.12.1/drivers/irqchip/
Dqcom-pdc.c40 u32 pin_base; member
45 #define pin_to_hwirq(r, p) ((r)->parent_base + (p) - (r)->pin_base)
215 if (pin >= pdc_region[i].pin_base && in get_pin_region()
216 pin < pdc_region[i].pin_base + pdc_region[i].cnt) in get_pin_region()
289 &pdc_region[n].pin_base); in pdc_setup_pin_mapping()
304 __pdc_enable_intr(i + pdc_region[n].pin_base, 0); in pdc_setup_pin_mapping()
/linux-6.12.1/drivers/gpio/
Dgpio-tangier.h54 unsigned int pin_base; member
61 .pin_base = (pstart), \
/linux-6.12.1/drivers/pinctrl/
Dpinctrl-equilibrium.c271 if (pin >= bank->pin_base && in find_pinbank_via_pin()
272 (pin - bank->pin_base) < bank->nr_pins) in find_pinbank_via_pin()
301 offset = pin - bank->pin_base; in eqbr_set_pin_mux()
306 pin, bank->pin_base, bank->aval_pinmap); in eqbr_set_pin_mux()
398 offset = pin - bank->pin_base; in eqbr_pinconf_get()
403 pin, bank->pin_base, bank->aval_pinmap); in eqbr_pinconf_get()
428 bank->pin_base, pin); in eqbr_pinconf_get()
469 offset = pin - bank->pin_base; in eqbr_pinconf_set()
497 bank->pin_base, pin); in eqbr_pinconf_set()
842 bank->pin_base = spec.args[1]; in pinbank_init()
[all …]
Dpinctrl-equilibrium.h81 unsigned int pin_base; member
Dpinctrl-rockchip.c287 while (pin >= (b->pin_base + b->nr_pins)) in pin_to_bank()
2906 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
2916 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
2934 return rockchip_set_mux(bank, offset - bank->pin_base, RK_FUNC_GPIO); in rockchip_pmx_gpio_set_direction()
3019 rc = rockchip_pinconf_defer_pin(bank, pin - bank->pin_base, param, in rockchip_pinconf_set()
3032 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3047 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3053 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3058 rc = gpio->direction_output(gpio, pin - bank->pin_base, in rockchip_pinconf_set()
3064 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
[all …]
Dcore.c288 return range->pin_base + pin; in gpio_to_pin()
495 } else if (pin >= range->pin_base && in pinctrl_find_gpio_range_from_pin_nolock()
496 pin < range->pin_base + range->npins) in pinctrl_find_gpio_range_from_pin_nolock()
1683 } else if ((pin >= range->pin_base) && in pinctrl_pins_show()
1684 (pin < (range->pin_base + range->npins))) { in pinctrl_pins_show()
1686 range->base + (pin - range->pin_base); in pinctrl_pins_show()
1789 range->pin_base, in pinctrl_gpioranges_show()
1790 (range->pin_base + range->npins - 1)); in pinctrl_gpioranges_show()
/linux-6.12.1/drivers/pinctrl/sunxi/
Dpinctrl-sunxi.c545 pin -= pctl->desc->pin_base; in sunxi_pconf_get()
604 pin -= pctl->desc->pin_base; in sunxi_pconf_set()
698 pin -= pctl->desc->pin_base; in sunxi_pinctrl_set_io_bias_cfg()
782 pin -= pctl->desc->pin_base; in sunxi_pmx_set()
841 unsigned short bank_offset = bank - pctl->desc->pin_base / in sunxi_pmx_request()
887 unsigned short bank_offset = bank - pctl->desc->pin_base / in sunxi_pmx_free()
997 unsigned pinnum = pctl->desc->pin_base + offset; in sunxi_pinctrl_gpio_to_irq()
1027 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_request_resources()
1045 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_release_resources()
1198 pin = pctl->desc->pin_base + base + intspec[1]; in sunxi_pinctrl_irq_of_xlate()
[all …]
Dpinctrl-sun50i-h616-r.c33 .pin_base = PL_BASE,
Dpinctrl-sun8i-a23-r.c92 .pin_base = PL_BASE,
Dpinctrl-sun8i-h3-r.c83 .pin_base = PL_BASE,
Dpinctrl-sun50i-a64-r.c101 .pin_base = PL_BASE,
Dpinctrl-sun50i-a100-r.c82 .pin_base = PL_BASE,
Dpinctrl-sun8i-a83t-r.c104 .pin_base = PL_BASE,
Dpinctrl-sun50i-h6-r.c106 .pin_base = PL_BASE,
Dpinctrl-sun6i-a31-r.c105 .pin_base = PL_BASE,
Dpinctrl-sun9i-a80-r.c151 .pin_base = PL_BASE,
/linux-6.12.1/drivers/pinctrl/starfive/
Dpinctrl-starfive-jh7100.c219 return pin - sfp->gpios.pin_base; in starfive_pin_to_gpio()
225 return sfp->gpios.pin_base + gpio; in starfive_gpio_to_pin()
1277 sfp->gpios.pin_base = PAD_INVALID_GPIO; in starfive_probe()
1280 sfp->gpios.pin_base = PAD_GPIO(0); in starfive_probe()
1283 sfp->gpios.pin_base = PAD_FUNC_SHARE(72); in starfive_probe()
1286 sfp->gpios.pin_base = PAD_FUNC_SHARE(70); in starfive_probe()
1289 sfp->gpios.pin_base = PAD_FUNC_SHARE(0); in starfive_probe()
/linux-6.12.1/drivers/pinctrl/samsung/
Dpinctrl-samsung.c362 while ((pin >= b->pin_base) && in pin_to_reg_bank()
363 ((b->pin_base + b->nr_pins - 1) < pin)) in pin_to_reg_bank()
367 *offset = pin - b->pin_base; in pin_to_reg_bank()
726 bank->grange.pin_base = bank->pin_base; in samsung_add_pin_ranges()
958 pdesc = pindesc + pin_bank->pin_base + pin; in samsung_pinctrl_register()
1237 bank->pin_base = d->nr_pins; in samsung_pinctrl_get_soc_data()
Dpinctrl-samsung.h207 u32 pin_base; member
/linux-6.12.1/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h188 .pin_base = _pinbase, \
/linux-6.12.1/include/linux/pinctrl/
Dpinctrl.h83 unsigned int pin_base; member

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