Searched refs:pd_info (Results 1 – 5 of 5) sorted by relevance
69 struct tpmi_uncore_power_domain_info *pd_info; member165 for (j = 0; j < uncore_root->pd_info[i].cluster_count; ++j) { in uncore_read_control_freq()166 read_control_freq(&uncore_root->pd_info[i].cluster_infos[j], in uncore_read_control_freq()308 for (j = 0; j < uncore_root->pd_info[i].cluster_count; ++j) in uncore_write_control_freq()309 write_control_freq(&uncore_root->pd_info[i].cluster_infos[j], in uncore_write_control_freq()400 struct tpmi_uncore_power_domain_info *pd_info; in remove_cluster_entries() local403 pd_info = &tpmi_uncore->pd_info[i]; in remove_cluster_entries()404 if (!pd_info->uncore_base) in remove_cluster_entries()407 for (j = 0; j < pd_info->cluster_count; ++j) { in remove_cluster_entries()410 cluster_info = &pd_info->cluster_infos[j]; in remove_cluster_entries()[all …]
329 struct tpmi_per_power_domain_info *pd_info, in sst_add_perf_profiles() argument336 pd_info->perf_levels = devm_kcalloc(dev, levels, sizeof(struct perf_level), GFP_KERNEL); in sst_add_perf_profiles()337 if (!pd_info->perf_levels) in sst_add_perf_profiles()340 pd_info->ratio_unit = pd_info->pp_header.ratio_unit; in sst_add_perf_profiles()341 pd_info->avx_levels = SST_MAX_AVX_LEVELS; in sst_add_perf_profiles()342 pd_info->pp_block_size = pd_info->pp_header.block_size; in sst_add_perf_profiles()345 *((u64 *)&pd_info->feature_offsets) = readq(pd_info->sst_base + in sst_add_perf_profiles()346 pd_info->sst_header.pp_offset + in sst_add_perf_profiles()349 perf_level_offsets = readq(pd_info->sst_base + pd_info->sst_header.pp_offset + in sst_add_perf_profiles()359 pd_info->perf_levels[i].mmio_offset = pd_info->sst_header.pp_offset + offset; in sst_add_perf_profiles()[all …]
312 const struct rockchip_domain_info *pd_info = pd->info; in rockchip_pmu_domain_is_idle() local316 return (val & pd_info->idle_mask) == pd_info->idle_mask; in rockchip_pmu_domain_is_idle()329 const struct rockchip_domain_info *pd_info = pd->info; in rockchip_pmu_ungate_clk() local332 int clk_ungate_w_mask = pd_info->clk_ungate_mask << 16; in rockchip_pmu_ungate_clk()334 if (!pd_info->clk_ungate_mask) in rockchip_pmu_ungate_clk()340 val = ungate ? (pd_info->clk_ungate_mask | clk_ungate_w_mask) : in rockchip_pmu_ungate_clk()350 const struct rockchip_domain_info *pd_info = pd->info; in rockchip_pmu_set_idle_request() local353 u32 pd_req_offset = pd_info->req_offset; in rockchip_pmu_set_idle_request()359 if (pd_info->req_mask == 0) in rockchip_pmu_set_idle_request()361 else if (pd_info->req_w_mask) in rockchip_pmu_set_idle_request()[all …]
2092 if ((instance->pd_info) && !MEGASAS_IS_LOGICAL(sdev)) in megasas_device_configure()4552 memset(instance->pd_info, 0, sizeof(*instance->pd_info)); in megasas_get_pd_info()4577 le16_to_cpus((u16 *)&instance->pd_info->state.ddf.pdType); in megasas_get_pd_info()4579 instance->pd_info->state.ddf.pdType.intf; in megasas_get_pd_info()7290 instance->pd_info = in megasas_alloc_ctrl_dma_buffers()7306 if (!instance->pd_info) in megasas_alloc_ctrl_dma_buffers()7372 if (instance->pd_info) in megasas_free_ctrl_dma_buffers()7374 instance->pd_info, instance->pd_info_h); in megasas_free_ctrl_dma_buffers()
2293 struct MR_PD_INFO *pd_info; member