Home
last modified time | relevance | path

Searched refs:pcie_dpm_enable_mask (Results 1 – 10 of 10) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.h169 uint32_t pcie_dpm_enable_mask; member
Dsmu7_hwmgr.c3036 if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { in smu7_force_dpm_highest()
3038 tmp = data->dpm_level_enable_mask.pcie_dpm_enable_mask; in smu7_force_dpm_highest()
3154 if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { in smu7_force_dpm_lowest()
3156 data->dpm_level_enable_mask.pcie_dpm_enable_mask); in smu7_force_dpm_lowest()
4361 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in smu7_generate_dpm_level_enable_mask()
4943 uint32_t tmp = mask & data->dpm_level_enable_mask.pcie_dpm_enable_mask; in smu7_force_clock_level()
/linux-6.12.1/drivers/gpu/drm/radeon/
Dci_dpm.h112 u32 pcie_dpm_enable_mask; member
Dci_dpm.c2600 pi->dpm_level_enable_mask.pcie_dpm_enable_mask = in ci_populate_smc_link_level()
3799 if (pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_upload_dpm_level_enable_mask()
3802 pi->dpm_level_enable_mask.pcie_dpm_enable_mask); in ci_upload_dpm_level_enable_mask()
4144 pi->dpm_level_enable_mask.pcie_dpm_enable_mask = in ci_generate_dpm_level_enable_mask()
4171 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_dpm_force_performance_level()
4173 tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask; in ci_dpm_force_performance_level()
4259 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_dpm_force_performance_level()
4261 pi->dpm_level_enable_mask.pcie_dpm_enable_mask); in ci_dpm_force_performance_level()
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvegam_smumgr.c594 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in vegam_populate_smc_link_level()
926 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && in vegam_populate_all_graphic_levels()
927 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in vegam_populate_all_graphic_levels()
931 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && in vegam_populate_all_graphic_levels()
932 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in vegam_populate_all_graphic_levels()
937 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in vegam_populate_all_graphic_levels()
Dfiji_smumgr.c849 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in fiji_populate_smc_link_level()
1055 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && in fiji_populate_all_graphic_levels()
1056 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in fiji_populate_all_graphic_levels()
1060 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && in fiji_populate_all_graphic_levels()
1061 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in fiji_populate_all_graphic_levels()
1066 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in fiji_populate_all_graphic_levels()
Dtonga_smumgr.c532 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in tonga_populate_smc_link_level()
745 if (0 == data->dpm_level_enable_mask.pcie_dpm_enable_mask) in tonga_populate_all_graphic_levels()
748 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && in tonga_populate_all_graphic_levels()
749 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in tonga_populate_all_graphic_levels()
754 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && in tonga_populate_all_graphic_levels()
755 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in tonga_populate_all_graphic_levels()
761 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in tonga_populate_all_graphic_levels()
Dpolaris10_smumgr.c840 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in polaris10_populate_smc_link_level()
1115 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && in polaris10_populate_all_graphic_levels()
1116 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in polaris10_populate_all_graphic_levels()
1120 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && in polaris10_populate_all_graphic_levels()
1121 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in polaris10_populate_all_graphic_levels()
1126 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in polaris10_populate_all_graphic_levels()
Diceland_smumgr.c789 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in iceland_populate_smc_link_level()
1005 while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in iceland_populate_all_graphic_levels()
1010 while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in iceland_populate_all_graphic_levels()
1016 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in iceland_populate_all_graphic_levels()
Dci_smumgr.c1017 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in ci_populate_smc_link_level()