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Searched refs:page_table_base (Results 1 – 25 of 38) sorted by relevance

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/linux-6.12.1/drivers/gpu/drm/amd/amdkfd/
Dkfd_pm4_headers.h69 uint32_t page_table_base:28; member
118 uint32_t page_table_base:28; member
Dkfd_packet_manager_vi.c56 packet->bitfields3.page_table_base = qpd->page_table_base; in pm_map_process_vi()
Dkfd_packet_manager_v9.c36 uint64_t vm_page_table_base_addr = qpd->page_table_base; in pm_map_process_v9()
93 uint64_t vm_page_table_base_addr = qpd->page_table_base; in pm_map_process_aldebaran()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gfxhub.h30 uint64_t page_table_base);
Dgfxhub_v1_2.c44 uint64_t page_table_base, in gfxhub_v1_2_xcc_setup_vm_pt_regs() argument
55 lower_32_bits(page_table_base)); in gfxhub_v1_2_xcc_setup_vm_pt_regs()
60 upper_32_bits(page_table_base)); in gfxhub_v1_2_xcc_setup_vm_pt_regs()
66 uint64_t page_table_base) in gfxhub_v1_2_setup_vm_pt_regs() argument
71 gfxhub_v1_2_xcc_setup_vm_pt_regs(adev, vmid, page_table_base, xcc_mask); in gfxhub_v1_2_setup_vm_pt_regs()
Damdgpu_mmhub.h63 uint64_t page_table_base);
Dgfxhub_v1_0.c41 uint64_t page_table_base) in gfxhub_v1_0_setup_vm_pt_regs() argument
47 lower_32_bits(page_table_base)); in gfxhub_v1_0_setup_vm_pt_regs()
51 upper_32_bits(page_table_base)); in gfxhub_v1_0_setup_vm_pt_regs()
Dgfxhub_v2_0.c121 uint64_t page_table_base) in gfxhub_v2_0_setup_vm_pt_regs() argument
127 lower_32_bits(page_table_base)); in gfxhub_v2_0_setup_vm_pt_regs()
131 upper_32_bits(page_table_base)); in gfxhub_v2_0_setup_vm_pt_regs()
Dgfxhub_v3_0_3.c123 uint64_t page_table_base) in gfxhub_v3_0_3_setup_vm_pt_regs() argument
129 lower_32_bits(page_table_base)); in gfxhub_v3_0_3_setup_vm_pt_regs()
133 upper_32_bits(page_table_base)); in gfxhub_v3_0_3_setup_vm_pt_regs()
Dgfxhub_v3_0.c120 uint64_t page_table_base) in gfxhub_v3_0_setup_vm_pt_regs() argument
126 lower_32_bits(page_table_base)); in gfxhub_v3_0_setup_vm_pt_regs()
130 upper_32_bits(page_table_base)); in gfxhub_v3_0_setup_vm_pt_regs()
Dgfxhub_v12_0.c128 uint64_t page_table_base) in gfxhub_v12_0_setup_vm_pt_regs() argument
134 lower_32_bits(page_table_base)); in gfxhub_v12_0_setup_vm_pt_regs()
138 upper_32_bits(page_table_base)); in gfxhub_v12_0_setup_vm_pt_regs()
Dmmhub_v3_0_2.c130 uint64_t page_table_base) in mmhub_v3_0_2_setup_vm_pt_regs() argument
136 lower_32_bits(page_table_base)); in mmhub_v3_0_2_setup_vm_pt_regs()
140 upper_32_bits(page_table_base)); in mmhub_v3_0_2_setup_vm_pt_regs()
Dgfxhub_v11_5_0.c125 uint64_t page_table_base) in gfxhub_v11_5_0_setup_vm_pt_regs() argument
131 lower_32_bits(page_table_base)); in gfxhub_v11_5_0_setup_vm_pt_regs()
135 upper_32_bits(page_table_base)); in gfxhub_v11_5_0_setup_vm_pt_regs()
Dmmhub_v3_0_1.c139 uint64_t page_table_base) in mmhub_v3_0_1_setup_vm_pt_regs() argument
145 lower_32_bits(page_table_base)); in mmhub_v3_0_1_setup_vm_pt_regs()
149 upper_32_bits(page_table_base)); in mmhub_v3_0_1_setup_vm_pt_regs()
Dmmhub_v2_0.c188 uint64_t page_table_base) in mmhub_v2_0_setup_vm_pt_regs() argument
194 lower_32_bits(page_table_base)); in mmhub_v2_0_setup_vm_pt_regs()
198 upper_32_bits(page_table_base)); in mmhub_v2_0_setup_vm_pt_regs()
Dmmhub_v2_3.c122 uint64_t page_table_base) in mmhub_v2_3_setup_vm_pt_regs() argument
127 hub->ctx_addr_distance * vmid, lower_32_bits(page_table_base)); in mmhub_v2_3_setup_vm_pt_regs()
130 hub->ctx_addr_distance * vmid, upper_32_bits(page_table_base)); in mmhub_v2_3_setup_vm_pt_regs()
Dmmhub_v3_3.c134 uint64_t page_table_base) in mmhub_v3_3_setup_vm_pt_regs() argument
140 lower_32_bits(page_table_base)); in mmhub_v3_3_setup_vm_pt_regs()
144 upper_32_bits(page_table_base)); in mmhub_v3_3_setup_vm_pt_regs()
Dmmhub_v3_0.c137 uint64_t page_table_base) in mmhub_v3_0_setup_vm_pt_regs() argument
143 lower_32_bits(page_table_base)); in mmhub_v3_0_setup_vm_pt_regs()
147 upper_32_bits(page_table_base)); in mmhub_v3_0_setup_vm_pt_regs()
Dmmhub_v4_1_0.c137 uint32_t vmid, uint64_t page_table_base) in mmhub_v4_1_0_setup_vm_pt_regs() argument
143 lower_32_bits(page_table_base)); in mmhub_v4_1_0_setup_vm_pt_regs()
147 upper_32_bits(page_table_base)); in mmhub_v4_1_0_setup_vm_pt_regs()
Damdgpu_amdkfd_gfx_v9.h54 uint32_t vmid, uint64_t page_table_base);
Dmmhub_v1_8.c56 uint64_t page_table_base) in mmhub_v1_8_setup_vm_pt_regs() argument
68 lower_32_bits(page_table_base)); in mmhub_v1_8_setup_vm_pt_regs()
73 upper_32_bits(page_table_base)); in mmhub_v1_8_setup_vm_pt_regs()
Dmmhub_v1_0.c55 uint64_t page_table_base) in mmhub_v1_0_setup_vm_pt_regs() argument
61 lower_32_bits(page_table_base)); in mmhub_v1_0_setup_vm_pt_regs()
65 upper_32_bits(page_table_base)); in mmhub_v1_0_setup_vm_pt_regs()
Damdgpu_amdkfd_gfx_v7.c540 uint32_t vmid, uint64_t page_table_base) in set_vm_context_page_table_base() argument
547 lower_32_bits(page_table_base)); in set_vm_context_page_table_base()
Dgfxhub_v2_1.c124 uint64_t page_table_base) in gfxhub_v2_1_setup_vm_pt_regs() argument
130 lower_32_bits(page_table_base)); in gfxhub_v2_1_setup_vm_pt_regs()
134 upper_32_bits(page_table_base)); in gfxhub_v2_1_setup_vm_pt_regs()
Damdgpu_amdkfd_gfx_v8.c575 uint32_t vmid, uint64_t page_table_base) in set_vm_context_page_table_base() argument
582 lower_32_bits(page_table_base)); in set_vm_context_page_table_base()

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