| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
| D | dcn314_dccg.c | 60 uint32_t otg_inst, in dccg314_get_pixel_rate_div() argument
70 switch (otg_inst) { in dccg314_get_pixel_rate_div()
102 uint32_t otg_inst, in dccg314_set_pixel_rate_div() argument
117 dccg314_get_pixel_rate_div(dccg, otg_inst, &cur_k1, &cur_k2); in dccg314_set_pixel_rate_div()
121 switch (otg_inst) { in dccg314_set_pixel_rate_div()
151 uint32_t otg_inst) in dccg314_set_dtbclk_p_src() argument
160 switch (otg_inst) { in dccg314_set_dtbclk_p_src()
220 REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo); in dccg314_set_dtbclk_dto()
221 REG_WRITE(DTBCLK_DTO_PHASE[params->otg_inst], phase); in dccg314_set_dtbclk_dto()
223 REG_UPDATE(OTG_PIXEL_RATE_CNTL[params->otg_inst], in dccg314_set_dtbclk_dto()
[all …]
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| D | dcn314_dccg.h | 209 int otg_inst,
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn32/ |
| D | dcn32_dccg.c | 60 uint32_t otg_inst, in dccg32_get_pixel_rate_div() argument
70 switch (otg_inst) { in dccg32_get_pixel_rate_div()
102 uint32_t otg_inst, in dccg32_set_pixel_rate_div() argument
117 dccg32_get_pixel_rate_div(dccg, otg_inst, &cur_k1, &cur_k2); in dccg32_set_pixel_rate_div()
121 switch (otg_inst) { in dccg32_set_pixel_rate_div()
151 uint32_t otg_inst) in dccg32_set_dtbclk_p_src() argument
159 switch (otg_inst) { in dccg32_set_dtbclk_p_src()
219 REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo); in dccg32_set_dtbclk_dto()
220 REG_WRITE(DTBCLK_DTO_PHASE[params->otg_inst], phase); in dccg32_set_dtbclk_dto()
222 REG_UPDATE(OTG_PIXEL_RATE_CNTL[params->otg_inst], in dccg32_set_dtbclk_dto()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| D | dcn20_dccg.c | 109 uint32_t otg_inst) in dccg2_otg_add_pixel() argument
113 REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg2_otg_add_pixel()
114 OTG_ADD_PIXEL[otg_inst], 0, in dccg2_otg_add_pixel()
115 OTG_DROP_PIXEL[otg_inst], 0); in dccg2_otg_add_pixel()
116 REG_UPDATE(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg2_otg_add_pixel()
117 OTG_ADD_PIXEL[otg_inst], 1); in dccg2_otg_add_pixel()
121 uint32_t otg_inst) in dccg2_otg_drop_pixel() argument
125 REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg2_otg_drop_pixel()
126 OTG_ADD_PIXEL[otg_inst], 0, in dccg2_otg_drop_pixel()
127 OTG_DROP_PIXEL[otg_inst], 0); in dccg2_otg_drop_pixel()
[all …]
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| D | dcn20_dccg.h | 447 uint32_t otg_inst);
449 uint32_t otg_inst);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
| D | dcn31_dccg.c | 97 static void dccg31_enable_dpstreamclk(struct dccg *dccg, int otg_inst) in dccg31_enable_dpstreamclk() argument
102 switch (otg_inst) { in dccg31_enable_dpstreamclk()
129 static void dccg31_disable_dpstreamclk(struct dccg *dccg, int otg_inst) in dccg31_disable_dpstreamclk() argument
138 switch (otg_inst) { in dccg31_disable_dpstreamclk()
164 int otg_inst, in dccg31_set_dpstreamclk() argument
168 dccg31_disable_dpstreamclk(dccg, otg_inst); in dccg31_set_dpstreamclk()
170 dccg31_enable_dpstreamclk(dccg, otg_inst); in dccg31_set_dpstreamclk()
580 REG_UPDATE(OTG_PIXEL_RATE_CNTL[params->otg_inst], in dccg31_set_dtbclk_dto()
581 DTBCLK_DTO_DIV[params->otg_inst], dtbdto_div); in dccg31_set_dtbclk_dto()
583 REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo); in dccg31_set_dtbclk_dto()
[all …]
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| D | dcn31_dccg.h | 216 int otg_inst,
225 uint32_t otg_inst);
229 uint32_t otg_inst);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
| D | dcn35_dccg.c | 1205 uint32_t otg_inst, in dccg35_get_pixel_rate_div() argument
1215 switch (otg_inst) { in dccg35_get_pixel_rate_div()
1247 uint32_t otg_inst, in dccg35_set_pixel_rate_div() argument
1263 dccg35_get_pixel_rate_div(dccg, otg_inst, &cur_k1, &cur_k2); in dccg35_set_pixel_rate_div()
1267 switch (otg_inst) { in dccg35_set_pixel_rate_div()
1297 uint32_t otg_inst) in dccg35_set_dtbclk_p_src() argument
1305 switch (otg_inst) { in dccg35_set_dtbclk_p_src()
1361 switch (params->otg_inst) { in dccg35_set_dtbclk_dto()
1380 REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo); in dccg35_set_dtbclk_dto()
1381 REG_WRITE(DTBCLK_DTO_PHASE[params->otg_inst], phase); in dccg35_set_dtbclk_dto()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | dccg.h | 60 int otg_inst; member
87 int otg_inst; member
105 uint32_t otg_inst);
107 uint32_t otg_inst);
117 int otg_inst,
175 uint32_t otg_inst,
180 uint32_t otg_inst,
187 int otg_inst,
213 uint32_t otg_inst);
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| D | abm.h | 59 bool (*set_abm_pause)(struct abm *abm, bool pause, unsigned int panel_inst, unsigned int otg_inst);
65 unsigned int otg_inst,
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| D | dwb.h | 170 int otg_inst; member
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| D | hubp.h | 208 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
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| D | stream_encoder.h | 282 uint32_t otg_inst; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
| D | dcn401_dccg.c | 121 uint32_t otg_inst, in dccg401_get_pixel_rate_div() argument
128 switch (otg_inst) { in dccg401_get_pixel_rate_div()
159 uint32_t otg_inst, in dccg401_set_pixel_rate_div() argument
173 dccg401_get_pixel_rate_div(dccg, otg_inst, &cur_tmds_div, &dp_dto_int); in dccg401_set_pixel_rate_div()
180 switch (otg_inst) { in dccg401_set_pixel_rate_div()
215 uint32_t otg_inst) in dccg401_set_dtbclk_p_src() argument
223 switch (otg_inst) { in dccg401_set_dtbclk_p_src()
364 uint32_t otg_inst) in dccg401_otg_add_pixel() argument
368 REG_UPDATE(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg401_otg_add_pixel()
369 OTG_ADD_PIXEL[otg_inst], 1); in dccg401_otg_add_pixel()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
| D | dcn21_hwseq.c | 140 static bool dmub_abm_set_pipe(struct abm *abm, uint32_t otg_inst, in dmub_abm_set_pipe() argument
150 cmd.abm_set_pipe.abm_set_pipe_data.otg_inst = otg_inst; in dmub_abm_set_pipe()
182 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_abm_immediate_disable() local
199 abm->funcs->set_pipe_ex(abm, otg_inst, SET_ABM_PIPE_IMMEDIATELY_DISABLE, in dcn21_set_abm_immediate_disable()
203 otg_inst, in dcn21_set_abm_immediate_disable()
218 uint32_t otg_inst; in dcn21_set_pipe() local
223 otg_inst = tg->inst; in dcn21_set_pipe()
232 otg_inst, in dcn21_set_pipe()
237 dmub_abm_set_pipe(abm, otg_inst, in dcn21_set_pipe()
252 uint32_t otg_inst; in dcn21_set_backlight_level() local
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dmub_abm_lcd.c | 254 uint32_t otg_inst, in dmub_abm_set_pipe() argument
266 cmd.abm_set_pipe.abm_set_pipe_data.otg_inst = otg_inst; in dmub_abm_set_pipe()
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| D | dmub_abm.c | 153 uint32_t otg_inst, in dmub_abm_set_pipe_ex() argument
164 ret = dmub_abm_set_pipe(abm, otg_inst, option, panel_inst, pwrseq_inst); in dmub_abm_set_pipe_ex()
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| D | dmub_abm_lcd.h | 47 bool dmub_abm_set_pipe(struct abm *abm, uint32_t otg_inst, uint32_t option, uint32_t panel_inst, ui…
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| D | dmub_replay.c | 157 copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst; in dmub_replay_copy_settings()
159 copy_settings_data->otg_inst = 0; in dmub_replay_copy_settings()
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| D | dmub_psr.c | 352 copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst; in dmub_psr_copy_settings()
354 copy_settings_data->otg_inst = 0; in dmub_psr_copy_settings()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/ |
| D | dm_cp_psp.h | 35 uint8_t otg_inst; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_crtc.c | 84 if (acrtc->otg_inst == -1) in amdgpu_dm_crtc_set_vupdate_irq()
87 irq_source = IRQ_TYPE_VUPDATE + acrtc->otg_inst; in amdgpu_dm_crtc_set_vupdate_irq()
297 if (acrtc->otg_inst == -1) in amdgpu_dm_crtc_set_vblank()
724 acrtc->otg_inst = -1; in amdgpu_dm_crtc_init()
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| D | amdgpu_dm_irq.c | 725 if (acrtc->otg_inst == -1) in dm_irq_state()
728 irq_source = dal_irq_type + acrtc->otg_inst; in dm_irq_state()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dmub/inc/ |
| D | dmub_cmd.h | 1083 uint32_t otg_inst: 3; member
1666 uint8_t otg_inst; member
1805 uint8_t otg_inst; member
2763 uint8_t otg_inst; member
3481 uint8_t otg_inst; member
3934 uint8_t otg_inst; member
4248 uint8_t otg_inst; member
4530 uint8_t otg_inst; member
4667 uint8_t otg_inst; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_structs.h | 530 unsigned char otg_inst; member
|