| /linux-6.12.1/drivers/virt/vboxguest/ |
| D | vboxguest_core.c | 561 req->or_mask = fixed_events; in vbg_reset_host_event_filter()
589 u32 or_mask, u32 not_mask, in vbg_set_session_event_filter() argument
614 session->event_filter |= or_mask; in vbg_set_session_event_filter()
623 or_mask = gdev->fixed_events | gdev->event_filter_tracker.mask; in vbg_set_session_event_filter()
625 if (gdev->event_filter_host == or_mask || !req) in vbg_set_session_event_filter()
628 gdev->event_filter_host = or_mask; in vbg_set_session_event_filter()
629 req->or_mask = or_mask; in vbg_set_session_event_filter()
630 req->not_mask = ~or_mask; in vbg_set_session_event_filter()
670 req->or_mask = 0; in vbg_reset_host_capabilities()
713 req->or_mask = caps; in vbg_set_host_capabilities()
[all …]
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| D | vmmdev.h | 191 u32 or_mask; member
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| /linux-6.12.1/include/uapi/linux/ |
| D | vboxguest.h | 247 __u32 or_mask; member
269 __u32 or_mask; member
291 __u32 or_mask; member
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | soc15.h | 43 u32 or_mask; member
100 #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \ argument
101 { ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
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| D | soc15.c | 461 tmp = entry->or_mask; in soc15_program_register_sequence()
467 tmp |= (entry->or_mask & entry->and_mask); in soc15_program_register_sequence()
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| D | amdgpu_device.c | 1367 u32 tmp, reg, and_mask, or_mask; in amdgpu_device_program_register_sequence() local
1376 or_mask = registers[i + 2]; in amdgpu_device_program_register_sequence()
1379 tmp = or_mask; in amdgpu_device_program_register_sequence()
1384 tmp |= (or_mask & and_mask); in amdgpu_device_program_register_sequence()
1386 tmp |= or_mask; in amdgpu_device_program_register_sequence()
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| /linux-6.12.1/drivers/staging/media/atomisp/pci/ |
| D | ia_css_pipe_public.h | 347 unsigned int or_mask,
368 unsigned int *or_mask,
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| D | sh_css_sp.c | 1512 event_irq_mask_init.or_mask = IA_CSS_EVENT_TYPE_ALL; in sh_css_event_init_irq_mask()
1529 unsigned int or_mask, in ia_css_pipe_set_irq_mask() argument
1551 IA_CSS_LOG("or_mask=%x, and_mask=%x", or_mask, and_mask); in ia_css_pipe_set_irq_mask()
1552 event_irq_mask.or_mask = (uint16_t)or_mask; in ia_css_pipe_set_irq_mask()
1570 unsigned int *or_mask, in ia_css_event_get_irq_mask() argument
1595 if (or_mask) in ia_css_event_get_irq_mask()
1596 *or_mask = event_irq_mask.or_mask; in ia_css_event_get_irq_mask()
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| D | sh_css_internal.h | 738 u16 or_mask; member
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| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | radeon_combios.c | 2876 uint32_t reg, val, and_mask, or_mask; in radeon_combios_external_tmds_setup() local
2904 or_mask = RBIOS32(index); in radeon_combios_external_tmds_setup()
2907 val = (val & and_mask) | or_mask; in radeon_combios_external_tmds_setup()
2958 or_mask = RBIOS32(index); in radeon_combios_external_tmds_setup()
2961 val = (val & and_mask) | or_mask; in radeon_combios_external_tmds_setup()
2973 or_mask = RBIOS32(index); in radeon_combios_external_tmds_setup()
2976 val = (val & and_mask) | or_mask; in radeon_combios_external_tmds_setup()
3007 uint32_t val, and_mask, or_mask; in combios_parse_mmio_table() local
3025 or_mask = RBIOS32(offset); in combios_parse_mmio_table()
3029 tmp |= or_mask; in combios_parse_mmio_table()
[all …]
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| D | radeon_device.c | 206 u32 tmp, reg, and_mask, or_mask; in radeon_program_register_sequence() local
215 or_mask = registers[i + 2]; in radeon_program_register_sequence()
218 tmp = or_mask; in radeon_program_register_sequence()
222 tmp |= or_mask; in radeon_program_register_sequence()
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| /linux-6.12.1/arch/mips/rb532/ |
| D | devices.c | 40 void set_latch_u5(unsigned char or_mask, unsigned char nand_mask) in set_latch_u5() argument
46 dev3.state = (dev3.state | or_mask) & ~nand_mask; in set_latch_u5()
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| /linux-6.12.1/arch/mips/include/asm/mach-rc32434/ |
| D | rb.h | 61 extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
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| /linux-6.12.1/drivers/iio/adc/ |
| D | mt6577_auxadc.c | 100 u32 or_mask, u32 and_mask) in mt6577_auxadc_mod_reg() argument
105 val |= or_mask; in mt6577_auxadc_mod_reg()
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| /linux-6.12.1/tools/testing/selftests/kvm/x86_64/ |
| D | pmu_counters_test.c | 359 uint8_t nr_counters, uint32_t or_mask) in guest_rd_wr_counters() argument
377 const bool expect_success = i < nr_counters || (or_mask & BIT(i)); in guest_rd_wr_counters()
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| /linux-6.12.1/drivers/net/ethernet/natsemi/ |
| D | ns83820.c | 1677 u32 or_mask = 0; local
1681 or_mask |= RFCR_AAU | RFCR_AAM;
1686 or_mask |= RFCR_AAM;
1691 val = (readl(rfcr) & and_mask) | or_mask;
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| /linux-6.12.1/mm/ |
| D | mm_init.c | 83 unsigned long or_mask, add_mask; in mminit_verify_pageflags_layout() local
142 or_mask = (ZONES_MASK << ZONES_PGSHIFT) | in mminit_verify_pageflags_layout()
148 BUG_ON(or_mask != add_mask); in mminit_verify_pageflags_layout()
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| /linux-6.12.1/drivers/gpu/drm/bridge/analogix/ |
| D | anx7625.c | 176 u8 offset, u8 and_mask, u8 or_mask) in anx7625_write_and_or() argument
185 offset, (val & and_mask) | (or_mask)); in anx7625_write_and_or()
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