Searched refs:ocsc_mode (Results 1 – 9 of 9) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/mpc/dcn20/ |
| D | dcn20_mpc.c | 135 enum mpc_output_csc_mode ocsc_mode) in mpc2_set_output_csc() argument
141 if (ocsc_mode == MPC_OUTPUT_CSC_DISABLE) { in mpc2_set_output_csc()
142 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); in mpc2_set_output_csc()
160 ocsc_mode = MPC_OUTPUT_CSC_COEF_A; in mpc2_set_output_csc()
162 ocsc_mode = MPC_OUTPUT_CSC_COEF_B; in mpc2_set_output_csc()
169 if (ocsc_mode == MPC_OUTPUT_CSC_COEF_A) { in mpc2_set_output_csc()
182 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); in mpc2_set_output_csc()
189 enum mpc_output_csc_mode ocsc_mode) in mpc2_set_ocsc_default() argument
197 if (ocsc_mode == MPC_OUTPUT_CSC_DISABLE) { in mpc2_set_ocsc_default()
198 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); in mpc2_set_ocsc_default()
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| D | dcn20_mpc.h | 296 enum mpc_output_csc_mode ocsc_mode);
302 enum mpc_output_csc_mode ocsc_mode);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_hw_sequencer.c | 712 block_sequence[*num_steps].params.set_output_csc_params.ocsc_mode = MPC_OUTPUT_CSC_COEF_A; in hwss_build_fast_sequence()
719 block_sequence[*num_steps].params.set_ocsc_default_params.ocsc_mode = MPC_OUTPUT_CSC_COEF_A; in hwss_build_fast_sequence()
929 enum mpc_output_csc_mode ocsc_mode = params->set_output_csc_params.ocsc_mode; in hwss_set_output_csc() local
935 ocsc_mode); in hwss_set_output_csc()
943 enum mpc_output_csc_mode ocsc_mode = params->set_ocsc_default_params.ocsc_mode; in hwss_set_ocsc_default() local
949 ocsc_mode); in hwss_set_ocsc_default()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | mpc.h | 643 enum mpc_output_csc_mode ocsc_mode);
665 enum mpc_output_csc_mode ocsc_mode);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| D | dcn10_dpp_cm.c | 256 uint32_t ocsc_mode; in dpp1_cm_program_color_matrix() local
276 ocsc_mode = 4; in dpp1_cm_program_color_matrix()
278 ocsc_mode = 5; in dpp1_cm_program_color_matrix()
286 if (ocsc_mode == 4) { in dpp1_cm_program_color_matrix()
303 REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode); in dpp1_cm_program_color_matrix()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/mpc/dcn30/ |
| D | dcn30_mpc.c | 1290 enum mpc_output_csc_mode ocsc_mode) in mpc3_set_output_csc() argument
1297 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); in mpc3_set_output_csc()
1299 if (ocsc_mode == MPC_OUTPUT_CSC_DISABLE) in mpc3_set_output_csc()
1312 if (ocsc_mode == MPC_OUTPUT_CSC_COEF_A) { in mpc3_set_output_csc()
1329 enum mpc_output_csc_mode ocsc_mode) in mpc3_set_ocsc_default() argument
1338 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); in mpc3_set_ocsc_default()
1339 if (ocsc_mode == MPC_OUTPUT_CSC_DISABLE) in mpc3_set_ocsc_default()
1355 if (ocsc_mode == MPC_OUTPUT_CSC_COEF_A) { in mpc3_set_ocsc_default()
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| D | dcn30_mpc.h | 1044 enum mpc_output_csc_mode ocsc_mode);
1050 enum mpc_output_csc_mode ocsc_mode);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/ |
| D | hw_sequencer.h | 128 enum mpc_output_csc_mode ocsc_mode; member
135 enum mpc_output_csc_mode ocsc_mode; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| D | dcn20_hwseq.c | 993 enum mpc_output_csc_mode ocsc_mode = MPC_OUTPUT_CSC_COEF_A; in dcn20_program_output_csc() local
1004 ocsc_mode); in dcn20_program_output_csc()
1010 ocsc_mode); in dcn20_program_output_csc()
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