Home
last modified time | relevance | path

Searched refs:nvkm_falcon_rd32 (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/falcon/
Dga102.c30 return (nvkm_falcon_rd32(falcon, falcon->addr2 + 0x388) & 0x00000080) != 0; in ga102_flcn_riscv_active()
36 return !!(nvkm_falcon_rd32(falcon, 0x118) & 0x00000002); in ga102_flcn_dma_done()
75 if (!(nvkm_falcon_rd32(falcon, 0x0f4) & 0x00001000)) in ga102_flcn_reset_wait_mem_scrubbing()
86 nvkm_falcon_rd32(falcon, 0x0f4); in ga102_flcn_reset_prep()
89 if (nvkm_falcon_rd32(falcon, 0x0f4) & 0x80000000) in ga102_flcn_reset_prep()
100 if ((nvkm_falcon_rd32(falcon, falcon->addr2 + 0x668) & 0x00000010) != 0x00000000) { in ga102_flcn_select()
103 if (nvkm_falcon_rd32(falcon, falcon->addr2 + 0x668) & 0x00000001) in ga102_flcn_select()
Dgm200.c31 u32 sctl = nvkm_falcon_rd32(falcon, 0x240); in gm200_flcn_tracepc()
32 u32 tidx = nvkm_falcon_rd32(falcon, 0x148); in gm200_flcn_tracepc()
38 ip = nvkm_falcon_rd32(falcon, 0x14c); in gm200_flcn_tracepc()
47 *(u32 *)img = nvkm_falcon_rd32(falcon, 0x1c4 + (port * 8)); in gm200_flcn_pio_dmem_rd()
54 u32 data = nvkm_falcon_rd32(falcon, 0x1c4 + (port * 8)); in gm200_flcn_pio_dmem_rd()
125 if (intr && !(nvkm_falcon_rd32(falcon, 0x008) & 0x00000008)) in gm200_flcn_bind_stat()
128 return (nvkm_falcon_rd32(falcon, 0x0dc) & 0x00007000) >> 12; in gm200_flcn_bind_stat()
146 if (!(nvkm_falcon_rd32(falcon, 0x10c) & 0x00000006)) in gm200_flcn_reset_wait_mem_scrubbing()
232 if (nvkm_falcon_rd32(falcon, 0x100) & 0x00000010) in gm200_flcn_fw_boot()
237 mbox0 = nvkm_falcon_rd32(falcon, 0x040); in gm200_flcn_fw_boot()
[all …]
Dmsgq.c29 msgq->position = nvkm_falcon_rd32(msgq->qmgr->falcon, msgq->tail_reg); in nvkm_falcon_msgq_open()
46 u32 head = nvkm_falcon_rd32(msgq->qmgr->falcon, msgq->head_reg); in nvkm_falcon_msgq_empty()
47 u32 tail = nvkm_falcon_rd32(msgq->qmgr->falcon, msgq->tail_reg); in nvkm_falcon_msgq_empty()
57 head = nvkm_falcon_rd32(falcon, msgq->head_reg); in nvkm_falcon_msgq_pop()
163 msgq->offset = nvkm_falcon_rd32(falcon, falcon->func->msgq.tail); in nvkm_falcon_msgq_recv_initmsg()
Dcmdq.c28 u32 head = nvkm_falcon_rd32(cmdq->qmgr->falcon, cmdq->head_reg); in nvkm_falcon_cmdq_has_room()
29 u32 tail = nvkm_falcon_rd32(cmdq->qmgr->falcon, cmdq->tail_reg); in nvkm_falcon_cmdq_has_room()
84 cmdq->position = nvkm_falcon_rd32(falcon, cmdq->head_reg); in nvkm_falcon_cmdq_open()
Dtu102.c27 return (nvkm_falcon_rd32(falcon, falcon->addr2 + 0x240) & 0x00000001) != 0; in tu102_flcn_riscv_active()
Dbase.c267 reg = nvkm_falcon_rd32(falcon, 0x12c); in nvkm_falcon_oneinit()
273 reg = nvkm_falcon_rd32(falcon, 0x108); in nvkm_falcon_oneinit()
278 u32 val = nvkm_falcon_rd32(falcon, func->debug); in nvkm_falcon_oneinit()
Dgp102.c28 *(u32 *)img = nvkm_falcon_rd32(falcon, 0xac4 + (port * 8)); in gp102_flcn_pio_emem_rd()
Dv1.c95 u32 reg = nvkm_falcon_rd32(falcon, 0x100); in nvkm_falcon_v1_start()
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dgk20a.c100 status->busy = nvkm_falcon_rd32(falcon, 0x508 + (BUSY_SLOT * 0x10)); in gk20a_pmu_dvfs_get_dev_status()
101 status->total= nvkm_falcon_rd32(falcon, 0x508 + (CLK_SLOT * 0x10)); in gk20a_pmu_dvfs_get_dev_status()
Dgm200.c30 return (nvkm_falcon_rd32(falcon, 0x20c) & 0x00007000) >> 12; in gm200_pmu_flcn_bind_stat()
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/sec2/
Dgp102.c158 u32 disp = nvkm_falcon_rd32(falcon, 0x01c); in gp102_sec2_intr()
159 u32 intr = nvkm_falcon_rd32(falcon, 0x008) & disp & ~(disp >> 16); in gp102_sec2_intr()
Dbase.c61 if (nvkm_falcon_rd32(falcon, 0x100) & 0x00000010) in nvkm_sec2_fini()
/linux-6.12.1/drivers/gpu/drm/nouveau/include/nvkm/engine/
Dfalcon.h113 nvkm_falcon_rd32(struct nvkm_falcon *falcon, u32 addr) in nvkm_falcon_rd32() function
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/
Dr535.c831 u32 intr = nvkm_falcon_rd32(&gsp->falcon, 0x0008); in r535_gsp_intr()
832 u32 inte = nvkm_falcon_rd32(&gsp->falcon, gsp->falcon.func->addr2 + in r535_gsp_intr()
1830 if (nvkm_falcon_rd32(&gsp->falcon, 0x100) & 0x00000040) in r535_gsp_msg_run_cpu_sequencer()
1838 if (nvkm_falcon_rd32(&gsp->falcon, 0x100) & 0x00000010) in r535_gsp_msg_run_cpu_sequencer()
1863 mbox0 = nvkm_falcon_rd32(&sec2->falcon, 0x040); in r535_gsp_msg_run_cpu_sequencer()
2375 if (nvkm_falcon_rd32(&gsp->falcon, 0x040) & 0x80000000) in r535_gsp_fini()