| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| D | dcn401_clk_mgr.c | 697 clk_mgr_base->clks.prev_num_ways = clk_mgr_base->clks.num_ways; in dcn401_update_clocks_legacy()
699 if (clk_mgr_base->clks.num_ways != new_clocks->num_ways && in dcn401_update_clocks_legacy()
700 clk_mgr_base->clks.num_ways < new_clocks->num_ways) { in dcn401_update_clocks_legacy()
701 clk_mgr_base->clks.num_ways = new_clocks->num_ways; in dcn401_update_clocks_legacy()
703 dcn401_smu_send_cab_for_uclk_message(clk_mgr, clk_mgr_base->clks.num_ways); in dcn401_update_clocks_legacy()
742 if (clk_mgr_base->clks.num_ways != new_clocks->num_ways && in dcn401_update_clocks_legacy()
743 clk_mgr_base->clks.num_ways > new_clocks->num_ways) { in dcn401_update_clocks_legacy()
744 clk_mgr_base->clks.num_ways = new_clocks->num_ways; in dcn401_update_clocks_legacy()
746 dcn401_smu_send_cab_for_uclk_message(clk_mgr, clk_mgr_base->clks.num_ways); in dcn401_update_clocks_legacy()
890 params->update_cab_for_uclk_params.num_ways); in dcn401_execute_block_sequence()
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| D | dcn401_clk_mgr_smu_msg.c | 150 void dcn401_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways) in dcn401_smu_send_cab_for_uclk_message() argument
152 uint32_t param = (num_ways << 1) | (num_ways > 0); in dcn401_smu_send_cab_for_uclk_message()
155 smu_print("Numways for SubVP : %d\n", num_ways); in dcn401_smu_send_cab_for_uclk_message()
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| D | dcn401_clk_mgr_smu_msg.h | 14 void dcn401_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways);
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| D | dcn401_clk_mgr.h | 44 unsigned int num_ways; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| D | dcn32_clk_mgr_smu_msg.c | 168 void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways) in dcn32_smu_send_cab_for_uclk_message() argument
170 uint32_t param = (num_ways << 1) | (num_ways > 0); in dcn32_smu_send_cab_for_uclk_message()
173 smu_print("Numways for SubVP : %d\n", num_ways); in dcn32_smu_send_cab_for_uclk_message()
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| D | dcn32_clk_mgr.c | 697 clk_mgr_base->clks.prev_num_ways = clk_mgr_base->clks.num_ways; in dcn32_update_clocks()
699 if (clk_mgr_base->clks.num_ways != new_clocks->num_ways && in dcn32_update_clocks()
700 clk_mgr_base->clks.num_ways < new_clocks->num_ways) { in dcn32_update_clocks()
701 clk_mgr_base->clks.num_ways = new_clocks->num_ways; in dcn32_update_clocks()
702 dcn32_smu_send_cab_for_uclk_message(clk_mgr, clk_mgr_base->clks.num_ways); in dcn32_update_clocks()
763 if (clk_mgr_base->clks.num_ways != new_clocks->num_ways && in dcn32_update_clocks()
764 clk_mgr_base->clks.num_ways > new_clocks->num_ways) { in dcn32_update_clocks()
765 clk_mgr_base->clks.num_ways = new_clocks->num_ways; in dcn32_update_clocks()
766 dcn32_smu_send_cab_for_uclk_message(clk_mgr, clk_mgr_base->clks.num_ways); in dcn32_update_clocks()
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| D | dcn32_clk_mgr_smu_msg.h | 40 void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ |
| D | dml2_mall_phantom.c | 34 uint32_t num_ways = 0; in dml2_helper_calculate_num_ways_for_subvp() local
94 num_ways = cache_lines_used / lines_per_way; in dml2_helper_calculate_num_ways_for_subvp()
96 num_ways++; in dml2_helper_calculate_num_ways_for_subvp()
98 return num_ways; in dml2_helper_calculate_num_ways_for_subvp()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| D | dcn32_hwseq.c | 223 uint32_t num_ways = 0; in dcn32_calculate_cab_allocation() local
242 num_ways = dc->debug.force_mall_ss_num_ways; in dcn32_calculate_cab_allocation()
244 num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, mall_ss_size_bytes); in dcn32_calculate_cab_allocation()
246 num_ways = 0; in dcn32_calculate_cab_allocation()
249 return num_ways; in dcn32_calculate_cab_allocation()
665 unsigned int num_ways = dcn32_calculate_cab_allocation(dc, context); in dcn32_update_mall_sel() local
700 num_ways <= dc->caps.cache_num_ways && in dcn32_update_mall_sel()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| D | dml21_wrapper.c | 187 …context->bw_ctx.bw.dcn.clk.num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, cont… in dml21_calculate_rq_and_dlg_params()
189 context->bw_ctx.bw.dcn.clk.num_ways = 0; in dml21_calculate_rq_and_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| D | dcn401_hwseq.c | 1270 uint8_t num_ways = 0; in dcn401_calculate_cab_allocation() local
1289 num_ways = dc->debug.force_mall_ss_num_ways; in dcn401_calculate_cab_allocation()
1291 num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, mall_ss_size_bytes); in dcn401_calculate_cab_allocation()
1293 num_ways = 0; in dcn401_calculate_cab_allocation()
1295 return num_ways; in dcn401_calculate_cab_allocation()
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_2.c | 52 uint32_t num_ways; member
1553 way = (instance / blk->num_mem_blocks) % blk->num_ways; in gfx_v9_4_2_log_utc_edc_count()
1554 bank = instance / (blk->num_mem_blocks * blk->num_ways); in gfx_v9_4_2_log_utc_edc_count()
1611 blk->num_banks * blk->num_ways * blk->num_mem_blocks; in gfx_v9_4_2_query_utc_edc_count()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| D | dcn32_resource.c | 1987 uint32_t cache_lines_used, lines_per_way, total_cache_lines, num_ways; in dcn32_calculate_mall_ways_from_bytes() local
1998 num_ways = cache_lines_used / lines_per_way; in dcn32_calculate_mall_ways_from_bytes()
2000 num_ways++; in dcn32_calculate_mall_ways_from_bytes()
2002 return num_ways; in dcn32_calculate_mall_ways_from_bytes()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 601 int num_ways; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | dcn32_fpu.c | 1781 context->bw_ctx.bw.dcn.clk.num_ways = dcn32_helper_calculate_num_ways_for_subvp(dc, context); in dcn32_calculate_dlg_params()
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