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Searched refs:num_tile_cols (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/media/platform/verisilicon/
Dhantro_hevc.c82 unsigned int num_tile_cols = pps->num_tile_columns_minus1 + 1; in tile_buffer_reallocate() local
86 if (num_tile_cols <= 1 || in tile_buffer_reallocate()
87 num_tile_cols <= hevc_dec->num_tile_cols_allocated) in tile_buffer_reallocate()
112 size = (VERT_FILTER_RAM_SIZE * height64 * (num_tile_cols - 1) * ctx->bit_depth) / 8; in tile_buffer_reallocate()
120 size = (VERT_SAO_RAM_SIZE * height64 * (num_tile_cols - 1) * ctx->bit_depth) / 8; in tile_buffer_reallocate()
128 size = BSD_CTRL_RAM_SIZE * height64 * (num_tile_cols - 1); in tile_buffer_reallocate()
136 hevc_dec->num_tile_cols_allocated = num_tile_cols; in tile_buffer_reallocate()
Dhantro_g2_hevc_dec.c19 unsigned int num_tile_cols = pps->num_tile_columns_minus1 + 1; in prepare_tile_info_buffer() local
44 vpu_debug(1, "Tiles enabled! %dx%d\n", num_tile_cols, num_tile_rows); in prepare_tile_info_buffer()
47 hantro_reg_write(vpu, &g2_num_tile_cols, num_tile_cols); in prepare_tile_info_buffer()
61 for (j = 0, tmp_w = 0; j < num_tile_cols - 1; j++) { in prepare_tile_info_buffer()
81 for (j = 0, prev_w = 0; j < num_tile_cols; j++) { in prepare_tile_info_buffer()
82 tmp = (j + 1) * pic_width_in_ctbs / num_tile_cols; in prepare_tile_info_buffer()
Drockchip_vpu981_hw_av1_dec.c261 unsigned int num_tile_cols = tile_info->tile_cols; in rockchip_vpu981_av1_dec_tiles_reallocate() local
268 ALIGN(height * 12 * ctx->bit_depth / 8, 128) * num_tile_cols) in rockchip_vpu981_av1_dec_tiles_reallocate()
273 size = ALIGN(height * 12 * ctx->bit_depth / 8, 128) * num_tile_cols; in rockchip_vpu981_av1_dec_tiles_reallocate()
281 size = ALIGN(height * 2 * 16 / 4, 128) * num_tile_cols; in rockchip_vpu981_av1_dec_tiles_reallocate()
289 size = ALIGN(height_in_sb * 44 * ctx->bit_depth * 16 / 8, 128) * num_tile_cols; in rockchip_vpu981_av1_dec_tiles_reallocate()
297 size = ALIGN(height_in_sb * (3040 + 1280), 128) * num_tile_cols; in rockchip_vpu981_av1_dec_tiles_reallocate()
305 size = ALIGN(stripe_num * 1536 * ctx->bit_depth / 8, 128) * num_tile_cols; in rockchip_vpu981_av1_dec_tiles_reallocate()
313 av1_dec->num_tile_cols_allocated = num_tile_cols; in rockchip_vpu981_av1_dec_tiles_reallocate()