Searched refs:num_queue_per_pipe (Results 1 – 16 of 16) sorted by relevance
52 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()53 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()62 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_queue_mask_bit_to_mec_queue()63 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()65 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()83 * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()84 bit += pipe * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()93 *queue = bit % adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_bit_to_me_queue()94 *pipe = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()96 *me = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()[all …]
181 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, in amdgpu_amdkfd_device_init()202 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
75 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in kgd_gfx_v9_get_queue_mask()964 pipe_idx = queue_idx / adev->gfx.mec.num_queue_per_pipe; in get_wave_count()965 queue_slot = queue_idx % adev->gfx.mec.num_queue_per_pipe; in get_wave_count()1045 adev->gfx.mec.num_queue_per_pipe; in kgd_gfx_v9_get_cu_occupancy()
109 u32 num_queue_per_pipe; member346 uint32_t num_queue_per_pipe; member
1298 adev->gfx.mec.num_queue_per_pipe; in gfx_v12_0_alloc_ip_dump()1311 adev->gfx.me.num_queue_per_pipe; in gfx_v12_0_alloc_ip_dump()1334 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v12_0_sw_init()1337 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v12_0_sw_init()1342 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v12_0_sw_init()1345 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v12_0_sw_init()1351 adev->gfx.mec.num_queue_per_pipe) / 2; in gfx_v12_0_sw_init()1401 for (j = 0; j < adev->gfx.me.num_queue_per_pipe; j++) { in gfx_v12_0_sw_init()1418 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v12_0_sw_init()5063 adev->gfx.mec.num_queue_per_pipe); in gfx_v12_ip_print()[all …]
1515 adev->gfx.mec.num_queue_per_pipe; in gfx_v11_0_alloc_ip_dump()1528 adev->gfx.me.num_queue_per_pipe; in gfx_v11_0_alloc_ip_dump()1551 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v11_0_sw_init()1554 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v11_0_sw_init()1563 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v11_0_sw_init()1566 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v11_0_sw_init()1571 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v11_0_sw_init()1574 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v11_0_sw_init()1636 for (j = 0; j < adev->gfx.me.num_queue_per_pipe; j++) { in gfx_v11_0_sw_init()1653 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v11_0_sw_init()[all …]
1041 adev->gfx.mec.num_queue_per_pipe; in gfx_v9_4_3_alloc_ip_dump()1078 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v9_4_3_sw_init()1124 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v9_4_3_sw_init()4613 adev->gfx.mec.num_queue_per_pipe; in gfx_v9_4_3_ip_print()4620 adev->gfx.mec.num_queue_per_pipe); in gfx_v9_4_3_ip_print()4627 for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) { in gfx_v9_4_3_ip_print()4674 adev->gfx.mec.num_queue_per_pipe; in gfx_v9_4_3_ip_dump()4683 for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) { in gfx_v9_4_3_ip_dump()
69 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
4662 adev->gfx.mec.num_queue_per_pipe; in gfx_v10_0_alloc_ip_dump()4675 adev->gfx.me.num_queue_per_pipe; in gfx_v10_0_alloc_ip_dump()4700 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v10_0_sw_init()4703 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()4715 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v10_0_sw_init()4718 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v10_0_sw_init()4723 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v10_0_sw_init()4726 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()4785 for (j = 0; j < adev->gfx.me.num_queue_per_pipe; j++) { in gfx_v10_0_sw_init()4802 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v10_0_sw_init()[all …]
67 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
2190 adev->gfx.mec.num_queue_per_pipe; in gfx_v9_0_alloc_ip_dump()2232 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v9_0_sw_init()2348 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v9_0_sw_init()7341 adev->gfx.mec.num_queue_per_pipe); in gfx_v9_ip_print()7345 for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) { in gfx_v9_ip_print()7382 for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) { in gfx_v9_ip_dump()
4365 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v7_0_sw_init()4418 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v7_0_sw_init()
1922 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v8_0_sw_init()1999 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v8_0_sw_init()
114 uint32_t num_queue_per_pipe; member
83 + pipe) * dqm->dev->kfd->shared_resources.num_queue_per_pipe; in is_pipe_enabled()86 for (i = 0; i < dqm->dev->kfd->shared_resources.num_queue_per_pipe; ++i) in is_pipe_enabled()101 return dqm->dev->kfd->shared_resources.num_queue_per_pipe; in get_queues_per_pipe()1666 mec = (i / dqm->dev->kfd->shared_resources.num_queue_per_pipe) in set_sched_resources()1833 num_hw_queue_slots = dqm->dev->kfd->shared_resources.num_queue_per_pipe * in start_cpsch()2128 mec = (i / dqm->dev->kfd->shared_resources.num_queue_per_pipe) in detect_queue_hang()