Searched refs:num_of_levels (Results 1 – 3 of 3) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
D | smu_v13_0.c | 2483 int num_of_levels = pcie_table->num_of_link_levels; in smu_v13_0_update_pcie_parameters() local 2487 if (!num_of_levels) in smu_v13_0_update_pcie_parameters() 2491 if (pcie_table->pcie_gen[num_of_levels - 1] < pcie_gen_cap) in smu_v13_0_update_pcie_parameters() 2492 pcie_gen_cap = pcie_table->pcie_gen[num_of_levels - 1]; in smu_v13_0_update_pcie_parameters() 2494 if (pcie_table->pcie_lane[num_of_levels - 1] < pcie_width_cap) in smu_v13_0_update_pcie_parameters() 2495 pcie_width_cap = pcie_table->pcie_lane[num_of_levels - 1]; in smu_v13_0_update_pcie_parameters() 2498 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_update_pcie_parameters() 2503 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_update_pcie_parameters() 2511 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_update_pcie_parameters()
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | vega12_hwmgr.c | 579 PPCLK_e clk_id, uint32_t *num_of_levels) in vega12_get_number_of_dpm_level() argument 586 num_of_levels); in vega12_get_number_of_dpm_level() 614 uint32_t i, num_of_levels, clk; in vega12_setup_single_dpm_table() local 616 ret = vega12_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels); in vega12_setup_single_dpm_table() 621 dpm_table->count = num_of_levels; in vega12_setup_single_dpm_table() 623 for (i = 0; i < num_of_levels; i++) { in vega12_setup_single_dpm_table()
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D | vega20_hwmgr.c | 537 PPCLK_e clk_id, uint32_t *num_of_levels) in vega20_get_number_of_dpm_level() argument 544 num_of_levels); in vega20_get_number_of_dpm_level() 572 uint32_t i, num_of_levels, clk; in vega20_setup_single_dpm_table() local 574 ret = vega20_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels); in vega20_setup_single_dpm_table() 579 dpm_table->count = num_of_levels; in vega20_setup_single_dpm_table() 581 for (i = 0; i < num_of_levels; i++) { in vega20_setup_single_dpm_table()
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